• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.105-108
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• 2002

Although asynchronous designs have become a promising way to develop complex modern digital systems, there is a few complete design framework for VLSI designers who wish to use automatic CAD tools. Especially, high-level synthesis is not widely concerned until now. In this paper we Proposed a method for high-level synthesis of asynchronous systems as a part of an asynchronous design framework. Our method performs scheduling, allocation, and binding, which are three subtasks of high-level synthesis, in simultaneous using a transformational approach. To deal with complexity of high-level synthesis we use neighborhood search algorithm such as Tabu search.

• The KIPS Transactions:PartA
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• v.9A no.3
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• pp.351-362
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• 2002

Along with an asynchronous finite state machine, in short AFSM, a signal transition graph, in short STG, is one of the most widely used behavioral description languages for asynchronous controllers. Unfortunately, STGs are not user-friendly, and thus it is very unwieldy and time consuming for system designers to conceive and describe manually the behaviors of a number of asynchronous controllers which constitute an asynchronous control unit for a target system in the form of STGs. In this paper, we suggest an automatic STG derivation method through a process-oriented method. Since the suggested method considers special properties of STG-based asynchronous logic synthesis very carefully, asynchronous controllers which are synthesized from STGs derived through the suggested method are superior in aspects of area, synthesis time, performance and implementability compared to those obtained through previous methods.

• ETRI Journal
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• v.35 no.1
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• pp.35-40
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• 2013

Asynchronous ranging is one practical method to implement a locating system that provides accurate results. However, a locating system utilizing asynchronous ranging generates a large number of messages that cause transmission delays or failures and degrades the system performance. This paper proposes a novel approach for efficient congestion control in an asynchronous range-based locating system. The proposed method significantly reduces the number of messages generated during the reader discovery phase by eavesdropping on other transmissions and improves the efficiency of ranging by organizing the tags in a hierarchical fashion in the measurement phase. Our evaluation shows that the proposed method reduces the number of messages by 70% compared to the conventional method and significantly improves the success rate of ranging.

• Journal of applied mathematics & informatics
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• v.7 no.3
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• pp.1045-1058
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• 2000

In usual synchronous parallel computing, workload balance is a crucial factor to reduce idle times of some processors that have finished their jobs earlier than others. However, it is difficult to achieve on a heterogeneous workstation clusters where the available computing power of each processor is unpredictable. As a way to overcome such a problem, the idea of asynchronous methods has grown out and is being increasingly used and studied, but there is none for eigenvalue problems yet. In this paper, we suggest a new asynchronous method to solve some singular matrix problems, that can also be used for finding a certain eigenvector of some matrices.

• Journal of Internet Computing and Services
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• v.4 no.5
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• pp.51-60
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• 2003

Asynchronous iteration is a way to reduce performance degradation of some parallel algorithms due to load imbalance or transmission delay between computing nodes, which requires asymmetric communication between the nodes of different speeds. To implement such asynchronous communication on distributed memory systems, we suggest an MPMD method that creates an additional separate server process on each computing node, and compare it with an SPMD method that creates a single process per node.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.1
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• pp.361-378
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• 2012

Most of the current frequency hopping (FH) based dynamic spectrum access (DSA) methods concern a reactive channel access scheme with synchronous inter-channel spectrum sensing, i.e., FH is reactively triggered by the primary user (PU)'s return reported by spectrum sensing, and the PU channel to be switched to is assumed precisely just sensed or ready to be sensed, as if the inter-channel spectrum sensing moments are synchronous. However, the inter-channel spectrum sensing moments are more likely to be asynchronous, which risks PU suffering more interference. Moreover, the spectrum sensing is usually erroneous, which renders the problem more complex. To address this problem, we propose a proactive FH based DSA method against both erroneous spectrum sensing and asynchronous inter-channel spectrum sensing (moments). We term it as proactive DSA. The optimal FH sequence is obtained by dynamic programming. The complexity is also analyzed. Finally, the simulation results confirm the effectiveness of the proposed method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.364-366
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• 2022

The web uses an asynchronous web method to provide various information having different processing speeds together. The asynchronous method has the advantage of being able to respond to other events even before the task is completed, but a typical crawler has difficulty collecting information provided asynchronously by collecting point-of-visit information on a web page. In addition, asynchronous web pages often do not change their web address even if the page content is changed, making it difficult to crawl. In this paper, we propose a web crawling algorithm considering asynchronous page movement by analyzing links in the web. With the proposed algorithm, it was possible to collect dictionary information on TTA terms that provide information asynchronously.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.93-99
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• 2011

A PRT vehicle's control method is presented in this paper. In the asynchronous vehicle control system, vehicles follow their leading vehicles. Leading vehicles are defined differently among the different types of track. The main topic of this paper is to present a method to define the leading vehicle among different types of track and the calculation algorithm of the safety length the following vehicle must maintain. Simulation program is developed using the algorithm and the results of the test run are presented. An asynchronous PRT vehicle control algorithm was presented by Szillat in the paper "A low level PRT Microsimulation, Dissertation, University of Bristol, 2001". But it is different from the algorithm in this paper. In the algorithm proposed by Markus, vehicles in the merging track are controlled synchronously, and its safety distance between the leading and the following car is evaluated after the establishment of the complicated future time-location table instead of simple equations proposed in this paper.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.1432-1435
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• 1996

This paper obtains maximum allowable delay bounds for stability of network-based control systems and presents a network scheduling method which makes the network-induced delay be less than the maximum allowable delay bound. The maximum allowable delay bounds are obtained using the Lyapunov theorem. Using the network scheduling method, the bandwidth of a network can be allocated to each node and the sampling period of each sensor and controller can be determined. The presented method can handle three kinds of data (periodic, real-time asynchronous, and non real-time asynchronous data) and guarantee real-time transmissions of real-time synchronous data and periodic data, and possible transmissions of non real-time asynchronous data. The proposed method is shown to be useful by examples in two types of network protocols such as the token control and the central control.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.221-225
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• 2000

We designed asynchronous event logic library with 0.25$\mu\textrm{m}$ CMOS technology and interface chip for heterogeneous system with high-speed asynchronous FIFO operating at 1.6㎓. Optimized asynchronous standard cell layouts and Verilog models are designed for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. This communication scheme using clock control circuits, which is used for the free of synchronization failures, is analyzed and implemented. With clock control circuit and FIFO, high-speed communication between synchronous modules operating at different clock frequencies or with asynchronous modules is performed. The core size of implemented high-speed 32bit-interface chip for heterogeneous system is about 1.1mm ${\times}$ 1.1mm.