• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.125-128
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• 2006

This paper presents a novel type soft switching PWM power frequency AC-AC converter using bidirectional active switches or single phase utility frequency AC-high frequency AC matrix converter. This converter can directly convert utility frequency AC (UFAC, 50Hz/60Hz) power to high frequency AC (HFAC) power ranging more than 20kHz up to 100kHz. A novel soft switching PWM prototype of high frequency multi-resonant PWM controlled UFAC-HFAC matrix converter using antiparallel one-chip reverse blocking IGBTs manufactured by IXYS corp. is based on the soft switching resonance with asymmetrical duty cycle PWM strategy. This single phase UFAC-HFAC matrix converter has some remarkable features as electrolytic capacitor DC busline linkless topology, unity power factor correction and sine-wave line current shaping, simple configuration with minimum circuit components, high efficiency and downsizing. This series load resonant UFAC-HFAC matrix converter, incorporating bidirectional active power switches is developed and implemented for high efficiency consumer induction heated food cooking appliances in home uses and business-uses. Its operating performances as soft switching operating ranges and high frequency effective power regulation characteristics are illustrated and discussed on the basis of simulation and experimental results.

• Journal of Power Electronics
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• 제17권1호
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• pp.222-231
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• 2017

In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

• 정보처리학회논문지A
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• 제18A권4호
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• pp.135-142
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• 2011

본 연구는 플래시 메모리 기반의 고성능 SSD (Solid State Disk) 구조를 위하여 디스크 참조 특성에 적응적으로 구동하는 효율적인 버퍼 구조와 구동 기법을 설계한다. 기존 SSD는 삭제동작 횟수의 제약은 물론 읽기와 쓰기 동작에 대하여 비대칭적인 성능을 보이는 특징을 갖고 있다. 이러한 삭제동작 횟수와 쓰기 동작의 지연시간을 최소화 하기 위해서는 다중 플래시 메모리 칩들에 대해 쓰기 동작은 병렬적으로 수행하는 정도를 최대화하여 운영하여야 한다. 따라서 플래시 메모리 칩들에 대한 인터리빙 레벨 (interleaving level)을 최대화 하기 위하여, 본 논문에서는 혼합 위치 사상 기법 (hybrid address mapping)과 슈퍼 블록 (super-block) 기반의 SSD 구조에 대하여 성능 증대와 증가된 장치 수명을 제공하기 위한 효율적 버퍼 구조를 제안한다. 제안한 버퍼구조는 응용 수행특성을 기반으로 최적의 임의/순차쓰기를 구분하며, 수행 성능에 중요한 순차쓰기 정도의 크기를 증대시키는 동적 융합 방법, 구동되는 버퍼구조와 사상 테이블의 효율적인 관리 구조를 설계하였으며, 이를 통해 기존의 단순한 버퍼 운영기법에 비하여 35%의 성능향상을 제공한다.