• Title/Summary/Keyword: Area Throughput

Search Result 459, Processing Time 0.03 seconds

Coverage Extension of Non-transparent Mode in IEEE 802.16j Mobile Multi-hop Relay Networks (IEEE 802.16j MMR 네트워크에서 Non-transparent 모드의 커버리지 확대)

  • Lee, Ju-Ho;Lee, Goo-Yeon;Jeong, Choong-Kyo
    • Journal of Industrial Technology
    • /
    • v.32 no.A
    • /
    • pp.3-8
    • /
    • 2012
  • In IEEE 802.16j standard document, two modes about usage of RS are proposed; one is transparent mode to enhance data throughput and the other is non-transparent mode to extend coverage. In this paper, we focus on non-transparent mode and find that the mode also affects data throughput. We analyze data throughput on various RS topology and their extended coverage area in non-transparent mode. From the analysis, we see that higher throughput can be obtained when MR-BS and RS are located distantly.

  • PDF

MAC Enhancement by Utilizing Multiple Channels in IEEE 802.15.3 High-Rate Wireless Personal Area Networks (IEEE 802.15.3 Wireless PAN의 MAC에서 다중채널의 적용)

  • Lee Byung-Joo;Rhee Seung Hyong;Choi WoongChul;Chung Kwangsue;Lee Jang-Yeol;Cho Jin-Woong
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.8A
    • /
    • pp.656-663
    • /
    • 2005
  • This paper presents a multi-channel enhancement scheme for the MAC protocol of IEEE 802.15.3 High-rate WPAN (Wireless Personal Area Network). The current MAC protocol of the IEEE 802.15.3 High-rate WPAN is designed for sharing a single channel among DEVs of a piconet; that is, within a single piconet, PNC prevents interference through MAC layer assignment of time slots to other DEVs using time-division multiple access. When the number of DEVs that communicate with each other frequently, is increased in a single WPAN, the size of the superframe becomes inevitably large, and this may result in a significant throughput drop or a failure to provide QoS guarantee. A multi-channel enhancement scheme for the MAC protocol of IEEE 802.15.3 High-rate WPAN is proposed to significantly increase the aguegate throughput and more reliably provide the QoS guarantees in a piconet

High-speed Design of 8-bit Architecture of AES Encryption (AES 암호 알고리즘을 위한 고속 8-비트 구조 설계)

  • Lee, Je-Hoon;Lim, Duk-Gyu
    • Convergence Security Journal
    • /
    • v.17 no.2
    • /
    • pp.15-22
    • /
    • 2017
  • This paper presents new 8-bit implementation of AES. Most typical 8-bit AES designs are to reduce the circuit area by sacrificing its throughput. The presented AES architecture employs two separated S-box to perform round operation and key generation in parallel. From the simulation results of the proposed AES-128, the maximum critical path delay is 13.0ns. It can be operated in 77MHz and the throughput is 15.2 Mbps. Consequently, the throughput of the proposed AES has 1.54 times higher throughput than the other counterpart although the area increasement is limited in 1.17 times. The proposed AES design enables very low-area design without sacrificing its performance. Thereby, it can be suitable for the various IoT applications that need high speed communication.

Tuning Backoff Period for Enhancing System Throughput with Estimating Number of Devices in IEEE 802.15.4 Slotted CSMA/CA (IEEE 802.15.4 슬롯 기반 CSMA/CA에서 시스템 처리율 향상을 위한 단말 수 추정을 통한 백오프 기간 튜닝 기법)

  • Lee, Won Hyoung;Hwang, Ho Young
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.22 no.9
    • /
    • pp.1243-1249
    • /
    • 2018
  • In this paper, we propose a scheme that tunes the backoff period for enhancing the system throughput with estimating the number of devices in IEEE 802.15.4 slotted carrier sense multiple access with collision avoidance (CSMA/CA) networks. Since each device does not sense the channel always in IEEE 802.15.4 slotted CSMA/CA networks, a personal area network (PAN) coordinator is used to estimate the number of active devices. The PAN coordinator broadcasts an optimal backoff period for the estimated number of devices through a beacon frame. In order to estimate the number of devices in run time, a simple moving average filter is utilized. We show the performance of our proposed scheme in terms of the estimated number of devices and the system throughput. The simulation results show that our proposed scheme can obtain higher system throughput than the IEEE 802.15.4 standard.

The Design and Implementation of Network Measurement System for Mobile Platforms (모바일 플랫폼을 위한 네트워크 환경 측정 시스템 설계 및 구현)

  • Kim, Kanghee;Yeo, Jinjoo;Kim, JinHyuk;Choi, SangBang
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.2
    • /
    • pp.35-46
    • /
    • 2013
  • As a rapid increase of mobile network usage, many studies on solution for network traffic's demand problem have been done. Especially network environment measurement area provides basis for solving network traffic's demand problem by finding causes of problems through accurate network analysis. However, as increase of demand for smartphone, we should consider effects of mobile platform's property measuring mobile network. In this paper, we design a network traffic measurement system considering mobile platform. Through the information from packets, this system calculates packet transmission delay and throughput. We minimize computation cost required for a mobile device that is a client in this system. When fully using network resources, we found that Wi-Fi has shorter transmission delay, higher maximum throughput and lower loss rate than 3G, Android has shorter transmission delay and higher maximum throughput than iOS, and UDP has longer transmission delay and higher maximum throughput through this system.

An Area-efficient Design of SHA-256 Hash Processor for IoT Security (IoT 보안을 위한 SHA-256 해시 프로세서의 면적 효율적인 설계)

  • Lee, Sang-Hyun;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.22 no.1
    • /
    • pp.109-116
    • /
    • 2018
  • This paper describes an area-efficient design of SHA-256 hash function that is widely used in various security protocols including digital signature, authentication code, key generation. The SHA-256 hash processor includes a padder block for padding and parsing input message, so that it can operate without software for preprocessing. Round function was designed with a 16-bit data-path that processed 64 round computations in 128 clock cycles, resulting in an optimized area per throughput (APT) performance as well as small area implementation. The SHA-256 hash processor was verified by FPGA implementation using Virtex5 device, and it was estimated that the throughput was 337 Mbps at maximum clock frequency of 116 MHz. The synthesis for ASIC implementation using a $0.18-{\mu}m$ CMOS cell library shows that it has 13,251 gate equivalents (GEs) and it can operate up to 200 MHz clock frequency.

Pareto Optimized EDCA Parameter Control for Wireless Local Area Networks

  • Kim, Minseok;Oh, Wui Hwan;Chung, Jong-Moon;Lee, Bong Gyou;Seo, Myunghwan;Kim, Jung-Sik;Cho, Hyung-Weon
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.8 no.10
    • /
    • pp.3458-3474
    • /
    • 2014
  • The performance of IEEE 802.11e enhanced distributed channel access (EDCA) is influenced by several interactive parameters that make quality of service (QoS) control complex and difficult. In EDCA, the most critical performance influencing parameters are the arbitration interframe space (AIFS) and contention window size (CW) of each access category (AC). The objective of this paper is to provide a scheme for parameter control such that the throughput per station as well as the overall system throughput of the network is maximized and controllable. For this purpose, a simple and accurate analytical model describing the throughput behavior of EDCA networks is presented in this paper. Based on this model, the paper further provides a scheme in which a Pareto optimal system configuration is obtained via an appropriate CW control for a given AIFS value, which is a different approach compared to relevant papers in the literature that deal with CW control only. The simulation results confirm the effectiveness of the proposed method which shows significant performance improvements compared to other existing algorithms.

A High Speed IP Address Lookup using Pipelined CAM Architecture(PICAM) (파이프라인 CAM 구조를 이용한 고속 IP주소룩업)

  • Ahn, Hee-Il;Cho, Tae-Won
    • Journal of IKEEE
    • /
    • v.5 no.1 s.8
    • /
    • pp.24-34
    • /
    • 2001
  • IP address lookup is a major bottleneck of IP packet processing in high speed router. Existing IP lookup methods are focused only on lookup throughput without considering lookup table update. So their slow update can lead to lookup blocking or wrong routing decision based on obsolete routes. Especially existing IP lookup methods based on CAM(content addressable memory) have slow update of O(n) cycles in spite of their high throughput and low area complexity In this paper we proposes a new IP address lookup method based on pipelined CAM architecture(PICAM) with fast update of O(1) cycle of lookup table and high throughput and low area complexity.

  • PDF

Proposal of a hierarchical topology and spatial reuse superframe for enhancing throughput of a cluster-based WBAN

  • Hiep, Pham Thanh;Thang, Nguyen Nhu;Sun, Guanghao;Hoang, Nguyen Huy
    • ETRI Journal
    • /
    • v.41 no.5
    • /
    • pp.648-657
    • /
    • 2019
  • A cluster topology was proposed with the assumption of zero noise to improve the performance of wireless body area networks (WBANs). However, in WBANs, the transmission power should be reduced as low as possible to avoid the effect of electromagnetic waves on the human body and to extend the lifetime of a battery. Therefore, in this work, we consider a bit error rate for a cluster-based WBAN and analyze the performance of the system while the transmission of sensors and cluster headers (CHs) is controlled. Moreover, a hierarchical topology is proposed for the cluster-based WBAN to further improve the throughput of the system; this proposed system is called as the hierarchical cluster WBAN. The hierarchical cluster WBAN is combined with a transmission control scheme, that is, complete control, spatial reuse superframe, to increase the throughput. The proposed system is analyzed and evaluated based on several factors of the system model, such as signal-to-noise ratio, number of clusters, and number of sensors. The calculation result indicates that the proposed hierarchical cluster WBAN outperforms the cluster-based WBAN in all analyzed scenarios.

In silico High-Throughput Screening by Hierarchical Chemical DB Search by 3D Pharmacophore Model

  • Shin, Jae-Min
    • Proceedings of the PSK Conference
    • /
    • 2002.10a
    • /
    • pp.181-182
    • /
    • 2002
  • Recentadvancesin '-omics ' technologies enable us to discover more diverse disease- relevant target proteins, which encourages us to find out more target-specific novel lead compounds as new drug candidates. Therefore, high-throughput screening (HTS) becomes an essential tool in this area. Among many HTS tools, in silico HTS is a very fast and cost-effective tool to try to derive a new lead compound for any new targets, especially when the target protein structures are known or readily modeled. (omitted)

  • PDF