• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.6 s.324
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• pp.33-39
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• 2004

Design of efficient Medium Access Control (MAC) protocols with both high throughput performances is a major focus in distributed contention based MAC protocol research. In this paper, we propose an efficient contention based MAC protocol for wireless Local Area Networks, namely, the Developed Collision Resolution (DCR) algorithm. This algorithm is developed based on the following innovative ideas: to speed up the collision resolution, we actively redistribute the backoff timers for all active nodes; to reduce the average number of idle slots, we use smaller contention window sizes for nodes with successful packet transmissions and reduce the backoff timers exponentially fast when a fixed number of consecutive idle slots are detected. We show that the proposed DCR algorithm provides high throughput performance and low latency in wireless LANs.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.75-81
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• 2015

This paper proposed the new eight-parallel MDC FFT processor using the eight-parallel MDC architecture and the efficient scheduling scheme. The proposed FFT processor supports the 256-point FFT based on the modified radix-$2^6$ FFT algorithm. The proposed scheduling scheme can reduce the number of complex multipliers from eight to six without increasing delay buffers and computation cycles. Moreover, the proposed FFT processor can be used in OFDM systems required high throughput and low hardware complexity. The proposed FFT processor has been designed and implemented with a 90nm CMOS technology. The experimental result shows that the area of the proposed FFT processor is $0.27mm^2$. Furthermore, the proposed eight-parallel MDC FFT processor can achieve the throughput rate up to 2.7 GSample/s at 388MHz.

• Journal of Advanced Navigation Technology
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• v.16 no.1
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• pp.96-102
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• 2012

The goal of mobile internet system is to provide a high-data-rate, low-latency and optimized packet radio access technology supporting flexible bandwidth deployments. Therefore, network architecture is designed with the goal to support packet-switched traffic with seamless mobility, quality of service and minimal latency. An important requirement for the mobile internet system is improved cell-edge BER performance and data throughput. This is to provide some level of service consistency in terms of geographical coverage as well as in terms of available data throughput within the communication coverage area. In a cellular system, however, the signal to interference plus noise power ratio gap between cell-center and cell-edge users can be of the order of 20 [dB]. The disparity can be even higher in a communication coverage limited cellular system. This leads to vastly lower data throughputs for the cell-edge users relative to cell-center users creating a large QoS gap. This paper proposes a analytical approach that tries to reduce inter-cell interference, and shows the SIR and BER performance according to the OFDM system parameters in mobile Internet environment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.9A
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• pp.837-843
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• 2006

IEEE802.15.3 and IEEE802.15.4 have defined the hybrid MAC protocols based on TDMA and CSMA where a multi-frame TDMA structure is employed so that multiple data frames can be transmitted within one timeslot to guarantee minimum delay bounds of isochroous traffic. However, TDMA has an intrinsic problem that cannot dynamically allocate optimal length of timeslot to each station. Therefore the idle timeslot can be produced by stations when each transmission queue is instantaneously empty during its timeslot, which would waste lots of timeslots especially in the multi-frame TDMA systems. In this paper, we propose a more flexible multiple-access scheme for the multi-frame TDMA system based on the concept of virtual slot which is accessible by every station with the highest priority for slot owner and lower priority for other stations. Finally, our simulation results from various environments show that proposed scheme can achieve magnitude improvement of total system throughput and average message delay by maximizing channel utilization.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.7A
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• pp.844-851
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• 2004

Various types of error are caused due to many factors of various environment in air interface channel of wireless communications. In this case, the reliability of the channel is much lower than that of wired case. IEEE 802.15.3 high-rate WPAN, which operates in an ad hoc networking environment, is more susceptible to such errors. The problem has been investigated for wireless LANs, for example, as follows. If the queue size of a certain node is longer than that of other nodes, the node estimates that its channel state is bad and the resource of the node is decreased. However this method has a disadvantage that a central controller must always monitor the status. To avoid this disadvantage, in this paper, a new MAC protocol that the throughput of overall piconet is increased by LDS (Link-status Dependent Scheduling) is proposed.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.25 no.5
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• pp.368-372
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• 2016

In this study, we develop a novel high-throughput micronanopatterning system that can implement continuous mechanical pattern inscribing on flexible substrates using a rigid grating mold edge. We perform a conceptual design of the process principle, specific modeling, and buildup of a real system prototype. This research also carefully addresses several important issues related to processing and controlling, including precision motion, alignment, heating, and sensing to enable a successful micronanopatterning in a continuous and high-speed fashion. Various micronanopatterns with the desired profiles can be created by tuning the mold shape, temperature, force, and substrate material toward many potential applications involving electronics, photonics, displays, light sources, and sensors, which typically require a large-area and flexible configurations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.4A
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• pp.394-400
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• 2010

Mobile Multi-hop Relaying (MMR) system can provide increased system capacity of wireless access network by coverage extension and enhanced transmission rate within the Base Station (BS) coverage area. The previous researches for the MMR system with a non-transparent mode Relay Station (RS) do not consider channel selection procedure of Mobile Station (MS), co-channel interference and Multi-hop Relay Base Station (MR-BS) coverage and RS coverage ratio in MMR system. In this paper, we investigate the performance of MMR uplink system in multicell environments with various topologies. The performance is presented in terms of call blocking probability, channel utilization, outage probability and system throughput by varying offered load. It is found that, for certain system parameters, the MMR uplink system achieve the maximum system throughput when MR-BS coverage to RS coverage ratio is 7.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.7B
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• pp.567-574
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• 2008

In this paper, we propose an optimal coverage extension scheme in the OFDMA based mobile multi-hop relay system. First, we propose an optimal frequency and time assignment scheme for maximizing system throughput and analyze the frame efficiency of schemes. Then, under the given BS capacity, we find the maximum number of relay hops that can be used to estimate the maximum coverage area of a BS in a multi-hop relay system. Analytical results show that the proposed scheme is efficient in coverage extension and throughput maximization in OFDMA based multi-hop relay system. Our work may be a rough guideline to control the parameters for multi-hop relay system optimization.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.257-260
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• 2002

This paper describes a design of cryptographic processor that implements the AES (Advanced Encryption Standard) block cipher algorithm“Rijndael”. To achieve high throughput rate, a sub-pipeline stage is inserted into the round transformation block, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. For area-efficient and low-power implementation the round transformation block is designed to share the hardware resources in encryption and decryption. An efficient scheme for on-the-fly key scheduling, which supports the three master-key lengths of 128-b/192-b/256-b, is devised to generate round keys in the first sub-pipeline stage of each round processing. The cryptoprocessor designed in Verilog-HDL was verified using Xilinx FPGA board and test system. The core synthesized using 0.35-${\mu}{\textrm}{m}$ CMOS cell library consists of about 25,000 gates. Simulation results show that it has a throughput of about 520-Mbits/sec with 220-MHz clock frequency at 2.5-V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.183-189
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• 2018

This paper proposes distributed file placement and coverage expansion techniques for mitigating the traffic bottleneck in backhaul for small-cell networks. In order to minimize the backhaul load with limited memory space, the proposed scheme controls the coverage and file placement of base station according to file popularity distribution and memory space of base stations. In other words, since the cache hit ratio is low when there is small memory capacity or widespread file popularity distribution, the base stations expand its coverage and cache different set of files for the user located in overlapped area to exploit multiple cached file sets of base stations. Our simulation results show that the proposed scheme outperforms the conventional cache strategy in terms of network throughput when there is small memory capacity or widespread file popularity distribution.