• Transactions of the Society of Information Storage Systems
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• v.1 no.2
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• pp.182-187
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• 2005

A large area micro mirror is an optical element that functions as changing an optical path by reflection in integrated optical system. We fabricated the large area silicon mirror by anisotropic etching using MEMS for implementation of integrated optical pickup. In this work, we report the optimum conditions to better fabricate and design, greatly improve mirror surface quality. To obtain mirror surface of $45^{\circ},\;9.74^{\circ}$ off-axis silicon wafer from (100) plane was used in etching condition of $80^{\circ}C$ with 40wt.% KOH solution. After wet etching, polishing process by MR fluid was applied to mirror surface for reduction of roughness. In the next step, after polymer coating on the polished Si wafer, the Si mirror was fabricated by UV curing using a trapezoid bar-type way structure. Finally, we obtained peak to valley roughness about 50 nm in large area of $mm^2$ and it is applicable to optical pickup using blu-ray wavelength as well as infrared wavelength.

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.264-267
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• 2007

It is important to reduce optical losses from front surface reflection to improve the efficiency of crystalline silicon solar cells. Surface texturing by isotropic etching with acid solution based on HF and $HNO_3$ is one of the promising methods that can reduce surface reflectance. Anisotropic texturing with alkali solution is not suitable for multicrystalline silicon wafers because of its various grain orientations. In this paper, we textured multicrystalline silicon wafers by simple wet chemical etching using acid solution to reduce front surface reflectance. After that, surface morphology of textured wafer was observed by Scanning Electron Microscope(SEM) and Atomic Force Microscope(AFM), surface reflectance was measured in wavelength from 400nm to 1000nm. We obtained 29.29% surface reflectance by isotropic texturing with acid solution in wavelength from 400nm to 1000nm for fabrication of multicrystalline silicon solar cells.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.600-602
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• 1995

Using the $O_2$ RIE process, 20{\mu}m$-height polyimide microstructures are fabricated. In LIGA-like process, metal microstructure can be formed by the electroplating using these polyimide microstructures as a plating mould. Reactive ion Etching technique using oxygen gas is used for the patterning of polyimide. The etching rate of the polyimide is increased with increased pressure and RF power. The anisotropic vertical sidewall can be obtained at low pressure, but the etched surface state is not so good yet. "Micrograss", which is formed during the RIE and disturbs uniform electroplating, can be removed effectively by the wet itching of the chromium sacrificial layer. More studies about the improvement of an etched surface state and the removal of microsgrass are needed.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.319-320
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• 2012

Large aperture optical modulator called optical shutter is a key component to realize time-of-flight (TOF) based three dimensional (3D) imaging systems [1-2]. The transmission type electro-absorption modulator (EAM) is a prime candidate for 3D imaging systems due to its advantages such as small size, high modulation performance [3], and ease of forming two dimensional (2D) array over large area [4]. In order to use the EAM for 3D imaging systems, it is crucial to remove GaAs substrate over large area so as to obtain high uniformity modulation performance at 850 nm. In this study, we propose and experimentally demonstrate techniques for backside etching of GaAs substrate over a large area having high uniformity. Various methods such as lapping and polishing, dry etching for anisotropic etching, and wet etching ([20%] C6H8O7 : H2O2 = 5:1) for high selectivity backside etching [5] are employed. A high transmittance of 80% over the large aperture area ($5{\times}5mm^2$) can be obtained with good uniformity through optimized backside etching method. These results reveal that the proposed methods for backside etching can etch the substrate over a large area with high uniformity, and the EAM fabricated by using backside etching method is an excellent candidate as optical shutter for 3D imaging systems.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.65-65
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• 1999

Dry etching technique provides more easy controllability on the etch profile such as anisotropic etching than wet etching process and the results of lots of researches on the characterization of various plasmas or ion beams for semiconductor etching have been reported. Chlorine-based plasmas or chlorine ion beam have been often used to etch several semiconductor materials, in particular Si-based materials. We have studied the effect of He flow rate on the Si and SiO2 dry etching using chlorine-based plasma. Experiments were performed using reactive ion etching system. RF power was 300W. Cl2 gas flow rate was fixed at 58.6 sccm, and the He flow rate was varied from 0 to 120 sccm. Fig. 1 presents the etch depth of si layer versus the etching time at various He flow rate. In case of low He flow rate, the etch rate was measured to be negligible for both Si and SiO2. As the He flow increases over 30% of the total inlet gas flow, the plasma state becomes stable and the etch rate starts to increase. In high Ge flow rate (over 60%), the relation between the etch depth and the time was observed to be nearly linear. Fig. 2 presents the variation of the etch rate depending on the He flow rate. The etch rate increases linearly with He flow rate. The results of this preliminary study show that Cl2/He mixture plasma is good candidate for the controllable si dry etching.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1038-1041
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• 2003

In the paper, we investigated silicon surface microstructures formed by reactive ion etching in hollow cathode system. Wet anisotropic chemical etching technique use to form random pyramidal structure on <100> silicon wafers usually is not effective in texturing of low-cost multicrystalline silicon wafers because of random orientation nature, but High density hollow cathode plasma system illustrates high deposition rate, better film crystal structure, improved etching characteristics. The etched silicon surface is covered by columnar microstructures with diameters form 50 to 100nm and depth of about 500nm. We used $SF_{6}$ and $O_{2}$ gases in HCP dry etch process. This paper demonstrates very high plasma density of $2{\times}10^{12}$ $cm^{-3}$ at a discharge current of 20 mA. Silicon etch rate of 1.3 ${\mu}s/min$. was achieved with $SF_{6}/O_{2}$ plasma conditions of total gas pressure=50 mTorr, gas flow rate=40 sccm, and rf power=200 W. Our experimental results can be used in various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications. In this paper we directed our study to the silicon etching properties such as high etching rate, large area uniformity, low power with the high density plasma.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.11
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• pp.841-845
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• 2013

We give a textured front on silicon wafer for high-efficiency solar cells by using micro contact printing method which uses PDMS (polydimethylsiloxane) silicon rubber as a stamp and SAM (self assembled monolayer)s as an ink. A random pyramidal texturing have been widely used for a front-surface texturing in low cost manufacturing line although the cell with random pyramids on front surface shows relatively low efficiency than the cell with inverted pyramids patterned by normal optical lithography. In the past two decades, the micro contact printing has been intensively studied in nano technology field for high resolution patterns on silicon wafer. However, this promising printing technique has surprisingly never applied so far to silicon based solar cell industry despite their simplicity of process and attractive aspects in terms of cost competitiveness. We employ a MHA (16-mercaptohexadecanoic acid) as an ink for Au deposited $SiO_2/Si$ substrate. The $SiO_2$ pattern which is same as the pattern printed by SAM ink on Au surface and later acts as a hard resist for anisotropic silicon etching was made by HF solution, and then inverted pyramidal pattern is formed after anisotropic wet etching. We compare three textured surface with different morphology (random texture, random pyramids and inverted pyramids) and then different geometry of inverted pyramid arrays in terms of reflectivity.

• Korean Journal of Optics and Photonics
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• v.16 no.2
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• pp.113-120
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• 2005

Luminous efficiency and uniformity in a LCD-BLU are mainly determined by fine scattering patterns formed on the light guide panel. We propose a novel fabrication method of 3-dimensional scattered patterns based on anisotropic etching of silicon wafers. Micro-pyramid patterns with 70.5 degree apex-angle and micro-prism patterns with 109.4 degree apex-angle can be self-constructed by the wet, anisotropic etching of (100) and (110) silicon wafers, respectively, and those patterns are easily duplicated by the PDMS replica process. Experimental results on spatial and angular distributions of irradiation from the light guide panel with the micro-pyramid patterns were very consistent with the calculation results. Surface roughness of the silicon-based micro-patterns is free from any artificial defects since the micro-patterns are inherently formed with silicon crystal surfaces. Therefore, we expect that the silicon based micro-patterning process makes it possible to fabricate perfect 3-dimensional micro-structures with crystal surface and apex angles, which may guarantee mass-reproduction of the light guide panels in LCD-BLU.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.25 no.1
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• pp.62-67
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• 2016

This paper presents a silicon nanostructure array embedded in a polymer film. The silicon nanostructure array was fabricated by using basic microelectromechanical systems (MEMS) processes such as photolithography, reactive ion etching, and anisotropic KOH wet etching. The fabricated silicon nanostructure array was transferred into polymer substrates such as polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), and polycarbonate (PC) through the hot-embossing process. In order to determine the transfer conditions under which the silicon nanostructures do not fracture, hot-embossing experiments were performed at various temperatures, pressures, and pressing times. Transfer was successfully achieved with a pressure of 1 MPa and a temperature higher than the transition temperature for the three types of polymer substrates. The transferred silicon nanostructure array was electrically evaluated through measurements with a semiconductor parameter analyzer (SPA).

• Journal of Sensor Science and Technology
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• v.15 no.1
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• pp.1-6
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• 2006

We fabricated Si nano-wire MOSFET by using the conventional photolithography with a $1.5{\mu}m$ resolution. Si nano-wire was fabricated by using reactive ion etching (RIE), anisotropic wet etching and thermal oxidation on a silicon-on-insulator (SOI) substrate, and its width is 30 nm. Logarithmic circuit consisting of a NMOSFET and Si nano-wire MOSFET has been constructed for application to high-sensitivity image sensor. Its sensitivity was 1.12 mV/lux. The output voltage swing was 1.386 V.