• Title/Summary/Keyword: Analog Computing

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Education Method for Programming through Physical Computing based on Analog Signaling of Arduino (아두이노 아날로그 신호 기반 피지컬 컴퓨팅을 통한 프로그래밍 교육 방법)

  • Hur, Kyeong;Sohn, Won-Sung
    • Journal of Korea Multimedia Society
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    • v.22 no.12
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    • pp.1481-1490
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    • 2019
  • Arduino makes it easy to connect objects and computers. As a result, programming learning using physical computing has been proposed as an effective alternative to SW training for beginners. In this paper, we propose an Arduino-based physical computing education method that can be applied to basic programming subjects. To this end, we propose a basic programming training method based on Arduino analog signals. Currently, physical computing courses focus on digital control when connecting input sensors and output devices in Arduino. However, the contents of programming education using analog signals of Arduino boards are insufficient. In this paper, we proposed and tested the teaching method used for programming education using low-cost materials used for Arduino analog signal-based computing.

ANALOG COMPUTING FOR A NEW NUCLEAR REACTOR DYNAMIC MODEL BASED ON A TIME-DEPENDENT SECOND ORDER FORM OF THE NEUTRON TRANSPORT EQUATION

  • Pirouzmand, Ahmad;Hadad, Kamal;Suh, Kune Y.
    • Nuclear Engineering and Technology
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    • v.43 no.3
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    • pp.243-256
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    • 2011
  • This paper considers the concept of analog computing based on a cellular neural network (CNN) paradigm to simulate nuclear reactor dynamics using a time-dependent second order form of the neutron transport equation. Instead of solving nuclear reactor dynamic equations numerically, which is time-consuming and suffers from such weaknesses as vulnerability to transient phenomena, accumulation of round-off errors and floating-point overflows, use is made of a new method based on a cellular neural network. The state-of-the-art shows the CNN as being an alternative solution to the conventional numerical computation method. Indeed CNN is an analog computing paradigm that performs ultra-fast calculations and provides accurate results. In this study use is made of the CNN model to simulate the space-time response of scalar flux distribution in steady state and transient conditions. The CNN model also is used to simulate step perturbation in the core. The accuracy and capability of the CNN model are examined in 2D Cartesian geometry for two fixed source problems, a mini-BWR assembly, and a TWIGL Seed/Blanket problem. We also use the CNN model concurrently for a typical small PWR assembly to simulate the effect of temperature feedback, poisons, and control rods on the scalar flux distribution.

A CMOS Analog Front End for a WPAN Zero-IF Receiver

  • Moon, Yeon-Kug;Seo, Hae-Moon;Park, Yong-Kuk;Won, Kwang-Ho;Lim, Seung-Ok;Kang, Jeong-Hoon;Park, Young-Choong;Yoon, Myung-Hyun;Yoo, June-Jae;Kim, Seong-Dong
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.769-772
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    • 2005
  • This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable-gain amplifier(PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance(Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of $0.19mm^2$.

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Optical Neural-Net Analog-to-Digital Converter:Implementation and Application (광신경망 A/D변환기:구현 및 응용)

  • 장주석;고상호;이수영;신상영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.38 no.10
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    • pp.795-804
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    • 1989
  • A parallel analog-to digital converter with neuron-like elements is designed and optically implemented. Its operation principle is based on the simultaneous estimation of bit values for a given analog input. The architecture of the proposed analog-to-digital converter is simpler than that of an earlier one designed by the energy minimization technique, and its digital output is independent of the initial state. Mixed binary-to-full binary converters are also designed by using out analog-to-digital converters as basic computing elements. These converters have simple structures and fast conversion times compared with earlier ones.

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Selection and research of physical computing game elements through case analysis (사례 분석을 통한 피지컬 컴퓨팅 게임 요소 선별 및 연구)

  • Lee, Jun-Suk;Rhee, Dae-Woong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.5
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    • pp.659-666
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    • 2021
  • This research will apply the environmental characteristics of physical computing to game development, which has the concept of giving substantial materiality to digital media that do not exist in reality. The processing process of physical computing is digital input and digital output, and analog input and analog output, which mainly uses Malik controllers. Therefore, we select development elements by analyzing research cases in the field of digital art and information education where physical computing is studied a lot, and by analyzing games that borrowed some physical computing elements. The derived elements are verified by the Delphi's research methodology through agreement with experts. 12 elements are selected in this study, and the importance is shown in order of the physical properties in the virtual world, the suitability of the implementation technology, and the conformity between real and virtual players.

Design of a Neural Chip for Classifying Iris Flowers based on CMOS Analog Neurons

  • Choi, Yoon-Jin;Lee, Eun-Min;Jeong, Hang-Geun
    • Journal of Sensor Science and Technology
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    • v.28 no.5
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    • pp.284-288
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    • 2019
  • A calibration-free analog neuron circuit is proposed as a viable alternative to the power hungry digital neuron in implementing a deep neural network. The conventional analog neuron requires calibrations because a voltage-mode link is used between the soma and the synapse, which results in significant uncertainty in terms of current mapping. In this work, a current-mode link is used to establish a robust link between the soma and the synapse against the variations in the process and interconnection impedances. The increased hardware owing to the adoption of the current-mode link is estimated to be manageable because the number of neurons in each layer of the neural network is typically bounded. To demonstrate the utility of the proposed analog neuron, a simple neural network with $4{\times}7{\times}3$ architecture has been designed for classifying iris flowers. The chip is now under fabrication in 0.35 mm CMOS technology. Thus, the proposed true current-mode analog neuron can be a practical option in realizing power-efficient neural networks for edge computing.

New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

  • Truong, Son Ngoc;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.3
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    • pp.356-363
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    • 2014
  • In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.

A Connection of Information in the Ubiquitous Space (유비쿼터스 공간에서의 정보 연결)

  • Ko Sung-Bum
    • Journal of Internet Computing and Services
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    • v.5 no.2
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    • pp.1-15
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    • 2004
  • The current Internet space is evolving to the so called Ubiquitous space. Unlike the Internet space, the information in the Ubiquitous space is distributed evenly in the places like computer's memory, human's brain and physical machine. The 'hypertext', the connection model of the information, which is originally designed for the Internet space doesn't suit well to the Ubiquitous space. From this point of view, we proposed the CPM model in this paper. The CPM model is designed for comprising the such three computing mechanism as analog computing, digital computing and human computing. In this paper, we showed that the characteristics of the CPM model might answer the such purpose as the connection of information in the Ubiquitous space.

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Analog Parallel Processing Algorithm of CNN-UM for Interframe Change Detection (프레임간의 영상 변화 검출을 위한 CNN-UM의 아날로그 병렬연산처리 알고리즘)

  • 김형석;김선철;손홍락;박영수;한승조
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.40 no.1
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    • pp.1-9
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    • 2003
  • The CNN-UM algorithm which performs the analog parallel subtraction of images has been developed and its application study to the moving target detection has been done. The CNN-UM is the state of the art computation architecture with high computational potential of analog parallel processing. It is one of the strong candidates for the next generation of computing system which fulfills requirement of the real-time image processing. One weakness of the CNN-UM is that its analog parallel processing function is not fully utilized for the inter frame processing. If two subsequent image frames are superimposed with opposite signs on identical capacitors for short time period, the analog subtraction between them is achieved. The Principle of such temporal inter-frame processing algorithm has been described and its mathematical analysis has been done. Practical usefulness of the proposed algorithm has also been verified through the application for moving target detection.