• Proceedings of the Optical Society of Korea Conference
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• 2004.02a
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• pp.264-265
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• 2004

• Proceedings of the Optical Society of Korea Conference
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• 2006.02a
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• pp.375-376
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• 2006

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1172-1175
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• 2011

In this paper, a design method of multi-tone signals for the measurement of adjacent-channel power-ratios on power amplifiers is suggested. Because most tests for power amplifiers in production are performed with single-tone signals, its testing accuracy is not guaranteed as the signal complexity increases. Therefore, the application of multi-tone signals to the testing is suggested by optimized complex coefficients of each tones for the best statistical similarity to the original modulated signal. From the verification, a 802.11a signal was replaced with a multi-tone signal of N=10, with the complex coefficients generated by the suggested method. The resulting measurements on the ACLR of 2.4 GHz power amplifier showed successful accuracy of less than 1 dB discrepancy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.131-136
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• 2008

Two Ka-band 3-stage power amplifiers were designed and fabricated using $0.18-{\mu}m$ CMOS technology. For low loss matching networks for the amplifiers, two substrate-shielded transmission line structures, having good modeling accuracy up to 40 GHz were used. The measured insertion loss of substrate-shielded microstrip-line (MSL) was 0.5 dB/mm at 27 GHz. A 3-stage CMOS amplifier using substrate-shielded MSL achieved a 14.7-dB small-signal gain and a 14.5-dBm output power at 27 GHz in a compact chip area of 0.83$mm^2$. The measured insertion loss of substrate-shielded coplanar waveguide (CPW) was 1.0 dB/mm at 27 GHz. A 3-stage amplifier using substrate-shielded CPW achieved a 12-dB small-signal gai and a 12.5-dBm output power at 26.5 GHz. This results shows a potential of CMOS technology for low cost short-range wireless communication components and system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.86-93
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• 2008

A low-power, low-noise, highly-linear hybrid balun circuit is proposed for 2.4-GHz fully differential CMOS direct conversion receivers. The hybrid balun is composed of a passive transformer and loss-compensating auxiliary amplifiers. Design issues regarding the optimal signal splitting and coupling between the transformer and compensating amplifiers are discussed. Implemented in $0.18{\mu}m$ CMOS process, the 2.4 GHz hybrid balun achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart and +23 dBm of IIP3 only at a current consumption of 0.67 mA from 1.2 V supply. It is also examined that the hybrid balun can remarkably lower the total noise figure of a 2.4 GHz fully differential RF receiver only at a cost of 0.82 mW additional power dissipation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.6
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• pp.1143-1150
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• 2001

In this paper, we designed a downconverter for K-band satellite multipoint distribution service(SMDS). The designed downconverter consists of a low noise amplifiers, bandpass filter, stable local oscillator, drain mixer and If Amplifiers. Low noise amplifiers show 28㏈ gain and 1.5㏈ noise figure in the frequency range of 19.2㎓~20.2㎓, and a band pass filter has a -l㏈ insertion loss, and 18.25㎓ Stable local oscillator which is dielectric resonant oscillation, We obtained that the output power of the 18.25㎓ oscillation frequency is 0.5㏈m and the phase noise is the -84.67㏈c at 10KHz offset frequency. With the input RF signal the 19.2㎓~20.2㎓, conversion gain of the drain mixer shows 5㏈ at the Intermediate frequency range of 950MHz~1950MHz. We have proved that the designed downconverter satisfied the specification of a K-band satellite multipoint distribution service and it can be applied to the satellite internet receiver.

• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.107-114
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• 2020

A power amplifier of 2.4 GHz ISM band is designed to implement a transmitter system. High efficiency amplifiers can be implemented as class E or class F amplifiers. This study has designed a 20 W high efficiency class E amplifier that has simple circuit structure in order to utilize for the ISM band application. The impedance matching circuit was designed by class E design theory and circuit simulation. The designed amplifier has the output power of 44.2 dBm and the power added efficiency of 69% at 2.45 GHz. In order to apply 30 dBm input power to the designed power amplifier, voltage controlled oscillator (VCO) and driving amplifier have been fabricated for the input feeding circuit. The measurement of the power amplifier shows 43.2 dBm output and 65% power added efficiency. This study can be applied to the design of power amplifiers for various wireless communication systems such as wireless power transfer, radio jamming device and high power transmitter.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.57-66
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• 1999

This paper describes a 12b, 50 Msample/s CMOS AID converter using an acquisition-time minimization technique for the high-speed sampling rate of 50 MHz level. The proposed ADC is implemented in a $0.35\mu\textrm{m}$ double-poly five-metal n-well CMOS technology and adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area. The speed limitation of conventional pipelined ADCs comes from the finite bandwidth and resulting speed of residue amplifiers. The proposed acquisition-time minimization technique reduces the acquisition time of residue amplifiers and makes the waveform of amplifier outputs smooth by controlling the operating current of residue amplifiers. The simulated power consumption of the proposed ADC is 197 mW at 3 V with a 50 MHz sampling rate. The chip size including pads is $3.2mm\times3.6mm$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.3
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• pp.40-47
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• 2009

This paper presents new drain bias scheme for the linearity enhancement of envelope tacking power amplifiers for W-CDMA base-stations. In the conventional envelope tracking power amplifiers, the drain bias voltage is lowered close to the knee voltage of transistor, resulting in the severe linearity degradation. To solve this problem, it is proposed in this paper that the amplifier is biased in the conventional class AB mode with a fixed drain bias voltage if the input envelope is low and in the envelope tracking mode otherwise. Moreover, the drain bias in the envelope tracking mode is newly determined to minimized the distortion. To verify the effectiveness of the proposed bias scheme, simulation is performed on the W-CDMA based-station envelope tracking power amplifier using class AB Si-LDMOS power amplifier. It is shown from the simulation that the proposed bias scheme allows a drastic linearity enhancement with the comparable efficiency enough to meet the requirement of W-CDMA base-station without additional linearization techniques.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.6
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• pp.251-257
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• 2014

An actuator system is a type of motor designed to control a mechanism operated by a source of energy, in the form of an electric current by converting energy into some kind of motion. As audio actuators, transforming electric voltage signal into audio signal, speakers and amplifiers are commonly used. In applications of industry, high output power systems are required. For these systems to generate high-quality output, it is essential to control output impedance of audio systems. We have developed an adaptable power supply for driving active amplifier systems with variable loads. Depending on the changing values of resistance of the speaker which produces audible sound by transforming electric voltage signal, the power supply source of the active amplifier can generate the maximum power delivered to the speaker by an adaptable change of loads. The amplifier is well protected from the abrupt increment of peak current and an excess of current flow.