• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.531-534
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• 2005

This paper presents a new data line sharing technique for TFT-LCD panels. This technique reduces the number of data driver IC's to half by having two adjacent pixels share the same data line. This in turn doubles the number of gate lines, which are integrated directly on the glass substrate of amorphous silicon for further cost reduction and more compactness. The proposed technique with new pixel array structure was applied to 15.4 inch WXGA TFT-LCD panels and has proven that the number of driver IC's were halved with nearly 41% circuit cost reduction and 5.3% reduction in power consumption without degrading the image quality.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1383-1385
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• 2009

This paper suggests that testing method and equipment structure to detect potential failures of LCD cells. LCD Cell Aging Tester is the unique process to detect failures related with ASG circuits. This system consists of four components that is Aging chamber, work table, probe contact unit, and pattern generator. The key factor of the concept is temperature aging and HVS driving. Complicated combination of test parameters including voltage, temperature and frequency provided practical burn-in conditions eligible for prediction of mass production.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.378-381
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• 2009

As a Joule-heat source, a conductive Mo layer was used to crystallize amorphous silicon for AMOLED backplanes. This Joule-heating induced crystallization (JIC) process could produce poly-Si having a grain size ranging from tens of nanometers to greater than several micrometers. Here, the blanket (single-shot whole-plane) crystallization could be achieved on the $2^{nd}$ and the $4^{th}$ generation glass substrate.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.75.2-75.2
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• 2010

We studied the fabrication of polycrystalline silicon (pc-Si) films as seed layers for application of pc-Si thin film solar cells, in which amorphous silicon (a-Si) films in a structure of glass/Al/$Al_2O_3$/a-Si are crystallized by the aluminum-induced layer exchange (ALILE) process. The properties of pc-Si films formed by the ALILE process are strongly determined by the oxide layer as well as the various process parameters like annealing temperature, time, etc. In this study, the effects of the oxide film thickness on the crystallization of a-Si in the ALILE process, where the thickness of $Al_2O_3$ layer was varied from 4 to 50 nm. For preparation of the experimental film structure, aluminum (~300 nm thickness) and a-Si (~300 nm thickness) layers were deposited using DC sputtering and PECVD method, respectively, and $Al_2O_3$ layer with the various thicknesses by RF sputtering. The crystallization of a-Si was then carried out by the thermal annealing process using a furnace with the in-situ microscope. The characteristics of the produced pc-Si films were analyzed by optical microscope (OM), scanning electron microscope (SEM), Raman spectrometer, and X-ray diffractometer (XRD). As results, the crystallinity was exponentially decayed with the increase of $Al_2O_3$ thickness and the grain size showed the similar tendency. The maximum pc-Si grain size fabricated by ALILE process was about $45{\mu}m$ at the $Al_2O_3$ layer thickness of 4 nm. The preferential crystal orientation was <111> and more dominant with the thinner $Al_2O_3$ layer. In summary, we obtained a pc-Si film not only with ${\sim}45{\mu}m$ grain size but also with the crystallinity of about 75% at 4 nm $Al_2O_3$ layer thickness by ALILE process with the structure of a glass/Al/$Al_2O_3$/a-Si.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.161-168
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• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2009.10a
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• pp.45-52
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• 2009

The research on miniature devices based on non-silicon materials, in particular polymeric materials has been attracting more and more attention in the research field of the micro/nano fabrication in recent years. Lost of applications and many literatures have been reported. However, the study on the micro thermal imprint process of glassy polymer is still not systematic and inadequate. The aim of this research I to obtain a numerical material model for an amorphous glassy polymer, polycarbonate (PC), which can be used in finite element analysis (FEA) of the micro thermal imprint process near the glass transition temperature (Tg). An understanding of the deformation behavior of the PC specimens was acquired by performing tensile stress relaxation tests. The viscoelastic material model based on generalized Maxwell model was introduced for the material near Tg to establish the FE model based on the commercial FEA code ABAQUS/Standard with a suitable set of parameters obtained for this material model form the test data. As a result, the feasibility of the established viscoelastic model for PC near Tg was confirmed and this material model can be used in FE analysis for the prediction and improvement of the micro thermal imprint process for pattern replication.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.6
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• pp.1095-1100
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• 2021

In this study, ITZO thin films were deposited on glass, sapphire, and PEN substrates by RF magnetron sputtering, and their electrical and optical properties were investigated. The resistivity of the ITZO thin film deposited on the glass and sapphire substrates was 3.08×10-4 and 3.21×10-4 Ω-cm, respectively, showing no significant difference, whereas the resistivity of the ITZO thin film deposited on the PEN substrate was 7.36×10-4 Ω-cm, which was a rather large value. Regardless of the type of substrate, there was no significant difference in the average transmittance of the ITZO thin film. Figure of Merits of the ITZO thin film deposited on the glass substrate obtained using the average transmittance in the absorption region of the amorphous silicon thin film solar cell and the absorption region of the P3HT : PCBM organic active layer were 10.52 and 9.28×10-3 Ω-1, respectively, which showed the best values. Through XRD and AFM measurements, it was confirmed that all ITZO thin films exhibited an amorphous structure and had no defects such as pinholes or cracks, regardless of the substrate type.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.391-391
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• 2016

The carrier transport is a key factor that determines the device performances of semiconductor devices such as solar cells and transistors [1]. Particularly, devices composed of in amorphous semiconductors, the transport is often restricted by carrier trapping, associated with various defects. So far, the trapping has been studied for as-grown films at room temperature; however it has not been studied during growth under plasma processing. Here, we demonstrate the detection of trapped carriers in hydrogenated amorphous silicon (a-Si:H) films during plasma processing, and discuss the carrier trapping and defect kinetics. Using an optically pump-probe technique, we detected the trapped carriers (electrons) in an a-Si:H films during growth by a hydrogen diluted silane discharge [2]. A device-grade intrinsic a-Si:H film growing on a glass substrate was illuminated with pump and probe light. The pump induced the photocurrent, whereas the pulsed probe induced an increment in the photocurrent. The photocurrent and its increment were separately measured using a lock-in technique. Because the increment in the photocurrent originates from emission of trapped carriers, and therefore the trapped carrier density was determined from this increment under the assumption of carrier generation and recombination dynamics [2]. We found that the trapped carrier density in device grade intrinsic a-Si:H was the order of 1e17 to 1e18 cm-3. It was highly dependent on the growth conditions, particularly on the growth temperature. At 473K, the trapped carrier density was minimized. Interestingly, the detected trapped carriers were homogeneously distributed in the direction of film growth, and they were decreased once the film growth was terminated by turning off the discharge.

• Journal of the Korean Vacuum Society
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• v.12 no.2
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• pp.130-135
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• 2003

Polycrystalline silicon thin films have been used for low cost thin film device application. However, it was very difficult to fabricate high performance poly-Si at a temperature lower than $600^{\circ}C$ for glass substrate because the crystallization process technologies like conventional solid phase crystallization (SPC) require the number of high temperature (600-$1000^{\circ}C$) process. The objective of this paper is to grow poly-Si on flexible substrate using a rapid thermal crystallization (RTC) of amorphous silicon (a-Si) layer and make the high temperature process possible on molybdenum substrate. For the high temperature poly-Si growth, we deposited the a-Si film on the molybdenum sheet having a thickness of 150 $\mu\textrm{m}$ as flexible and low cost substrate. For crystallization, the heat treatment was performed in a RTA system. The experimental results show the grain size larger than 0.5 $\mu\textrm{m}$ and conductivity of $10^{-5}$ S/cm. The a-Si was crystallized at $1050^{\circ}C$ within 3min and improved crystal volume fraction of 92 % by RTA. We have successfully achieved a field effect mobility over 67 $\textrm{cm}^2$/Vs.