• Journal of Electrical Engineering and Technology
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• 제6권5호
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• pp.658-665
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• 2011

In the present paper, a novel fast peak detector for single- or three-phase unsymmetrical voltage sags is proposed. The proposed detector is modified from a single-phase digital phase-locked loop based on a d-q transformation using an all-pass filter (APF). APF generates a virtual phase with $90^{\circ}$ phase delay. However, this virtual phase cannot reflect a sudden change of the grid voltage in the moment of voltage sag, which causes a peak value to be significantly distorted and to settle down slowly. Specifically, the settling time of the peak value is too long when voltage sag occurs around a zero crossing, such as phase $0^{\circ}$ and $180^{\circ}$. This paper describes the operating principle of the APF problem and proposes a modified all-pass filter (MAPF) to mitigate the inherent APF problem. In addition, a new fast peak detector using MAPF is proposed. The proposed detector is able to calculate a peak value within 0.5 ms, even when voltage sag occurs around zero crossing. The proposed fast peak detector is compared with the conventional detector using APF. Results show that the proposed detector has faster detection time in the whole phase range. Furthermore, the proposed fast peak detector can be effectively applied to unsymmetrical three-phase voltage sags. Simulation and experimental results verify the advantages of the proposed detector and MAPF.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.447-448
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• 2015

지연 등화기(Delay Equalizer) 또는 위상 필터(Phase Filter)라고도 불리는 전역 통과 필터(All Pass Filter)는 주파수의 변화와 관계없이 위상만을 변화 시키는 시간 지연 장치(Time Delay Device)이다. 모든 주파수에서 진폭의 이득이 '0' 또는 일정하지만, 위상의 특성만을 개선하기 위해 사용되는 위상 필터 이다. 본 논문은 이와 같은 전역 통과 필터(APF)의 특성을 이용하여 순시 유효 전력(Active Power) 및 순시 무효 전력(Reactive Power)의 측정 방법에 대하여 연구하였다. 전역 통과 필터(APF)의 좌표변환을 사용하여, 필터에서의 정보를 통한 유효 전력과 무효 전력 측정이 가능하다. 따라서 본 논문에서는 시뮬레이션을 통해 그 타당성을 검증하였다.

• 조명전기설비학회논문지
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• 제28권12호
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• pp.65-73
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• 2014

In this paper, the detection scheme of the voltage variation using a two difference voltage is proposed. The conventional sag detector is from a single-phase digital phase-locked loop (DPLL) that is based on a d-q transformation using an all-pass filter (APF). The APF generates a virtual q-axis voltage component with $90^{\circ}$ phase delay but the APF cannot generate the virtual q-axis voltage depending on the phase of the grid voltage. To overcome the problem, q-axis voltage component is generated from difference between the current and previous value of d-axis voltage component in the stationary reference frame. However, the difference voltage around the zero crossing is not enough to detect the voltage sag. Therefore, the new detection scheme using the two difference voltage which can detect the sag around the zero crossing voltage is proposed.

• 전력전자학회논문지
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• 제13권2호
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• pp.145-151
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• 2008

본 논문에서는 계통 전압이 불평형인 경우에 정확한 위상각을 검출할 수 있는 정상분 전압 관측기를 이용한 PLL(Phase Locked Loop) 방법을 제안한다. 제안된 PLL 방법은 기존의 전역 통과 필터(APF, All Pass Filter)를 이용하여 불평형 전원전압으로부터 정상분 전압을 구하는 것과는 달리 전차원 상태관측기를 사용함으로써 불평형사고 발생 시 추정위상각의 과도상태 응답특성을 개선하였다. 기존의 정상분 전압 추출 PLL 방법과 본 논문에서 제안된 PLL 방법의 성능을 비교하기 위해, 전원단 전압에 불평형 사고 발생시 위상각을 검출하는 실험을 하였고, 이를 통해 기존의 전역 통과 필터를 이용한 정상분 전압 추출 PLL 방법보다 제안된 전차원 상태관측기를 이용한 정상분 전압 추출 PLL 방법의 과도상태 응답특성이 개선됨을 입증하였다.

• 대한전자공학회논문지SP
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• 제43권5호
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• pp.62-71
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• 2006

최근에 모바일 기기와 같은 적은 메모리를 요구하는 환경에 적합한 인공잔향기의 개발이 이슈화 되고 있다. 이러한 조건에 적합한 한가지 방법은 콤 필터의 궤환루프안에 시간변화 전대역통과 필터(APF)를 삽입하는 것이다. 본 논문에서는 시간변화 APF를 사용하는 잔향기의 이론적, 지각적 분석을 시행함으로써 지각적으로 수용 가능한 APF의 페이즈 변화량을 찾았다. 그리고 이를 바탕으로 새로운 시간변화 잔향기 설계 방법을 제안한다. 제안된 잔향기의 성능평가를 통해 제안된 잔향기가 적은 메모리를 사용하면서도 기존의 시불변 잔향기와 동일한 성능을 보임을 확인하였다.

• Journal of the Optical Society of Korea
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• 제17권5호
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• pp.441-446
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• 2013

A split-step time-domain model for the analysis of pulse delay characteristics through ring resonator all-pass filters (APF's) is developed and its accuracy is checked. The dependence of the delay time and pulse distortion on the coupling ratios is investigated using the model. It is observed that the bandwidth of the APF's needs to be wide enough to minimize the pulse distortion.

• Journal of Electrical Engineering and Technology
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• 제11권1호
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• pp.157-166
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• 2016

In this paper, a new sag and peak voltage detector is proposed for a single-phase inverter using delta square operation. The conventional sag detector is from a single-phase digital phase-locked loop (DPLL) that is based on d-q transformations using an all-pass filter (APF). The d-q transformation is typically used in the three-phase coordinate system. The APF generates a virtual q-axis voltage component with a 90° phase delay, but this virtual phase cannot reflect a sudden change in the grid voltage at the instant the voltage sag occurs. As a result, the peak value is drastically distorted, and it settles down slowly. A modified APF generates the virtual q-axis voltage component from the difference between the current and the previous values of the d-axis voltage component in the stationary reference frame. However, the modified APF cannot detect the voltage sag and peak value when the sag occurs around the zero crossing points such as 0° and 180°, because the difference voltage is not sufficient to detect the voltage sag. The proposed algorithm detects the sag voltage through all regions including the zero crossing voltage. Moreover, the exact voltage drop can be acquired by calculating the q-axis component that is proportional to the d-axis component. To verify the feasibility of the proposed system, the conventional and proposed methods are compared using simulations and experimental results.

• Journal of Power Electronics
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• 제16권1호
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• pp.18-26
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• 2016

This paper proposes a compensation algorithm for reducing a specific ripple component on synchronous reference frame phase locked loop (SRF-PLL) in grid-tied single-phase inverters. In general, SRF-PLL, which is based on all-pass filter to generate virtual voltage, is widely used to estimate the grid phase angle in a single-phase system. In reality, the estimated grid phase angle might be distorted because the phase difference between actual and virtual voltages is not 90 degrees. That is, the phase error is caused by the difference between cut-off frequency of all-pass filter and grid frequency under grid frequency variation. Therefore, the effects on phase angle and output current attributed to the phase error are mathematically analyzed in this paper. In addition, the proportional resonant (PR) controller is adapted to reduce the effects of phase error. The validity of the proposed algorithm is verified through several simulations and experiments.

• 전기학회논문지
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• 제66권1호
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• pp.211-215
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• 2017

The APF (All Pass Filter) method that utilizes the computational power of the controller is most commonly used. However, since the calculation of the filter coefficient is complicated, the calculation is carried out in advance. It is difficult to apply it to the frequency fluctuation environment because the coefficient value is fixed. In this paper, a new control method of single phase PLL that can be usefully used in PWM converter device for electric railway was explained. Comparison and examination of similarities and differences between the conventional APF method PLL controller method and the newly proposed modified MA filter method PLL technique were performed. The possibility of implementation of the modified MA filter method through computer simulation was analyzed. In conclusion, the method proposed as the conclusion was applied to the APU(Auxiliary Power System) of 8200 Series Electric Locomotive and its usefulness was confirmed.

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1589-1596
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• 2015

A novel control method of a three-phase PWM inverter with LC filter is proposed. The transfer function of LC filter is the same as that of 2nd order low pass filter(2nd LPF) which has a zero damping ratio. A simple method of implementing 2nd LPF with damping ratio is to add resistor to inductor or capacitor of LC filter. In an industrial application, it is not practical to adopt damping resistor because it results in losses being proportional to square of current flowing through resistor. Instead of using damping resistors, the proposed active damping control(ADC) utilizes all pass filter(APF) and considers inherent processing delay of digital controller. The overall transfer function of the proposed method is the same as a 2nd LPF and its damping ratio is also controllable via control variables. Detailed design and implementation of controller is also presented. Experiments are conducted with a 7.5kVA induction motor drive system controlled by PWM converter and inverter. Test waveforms are also presented to verify the proposed LC filter control algorithm.