• 한국수학교육학회지시리즈D:수학교육연구
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• 제13권3호
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• pp.197-216
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• 2009

The purpose of this study was to investigate middle and high school mathematics teachers' levels and multiple approaches in United States practicing their abstraction levels and, different strategies and method of solutions towards given number theory problems. The mathematics teachers taking part in this study are consisted of 25 members of online graduate and undergraduate course (MAE 5641 and MAE 4813) delivered through Online Learning System called as the Blackboard (http://www.blackboard.com). Data collection methods include journal entries, written solutions to problems, the teachers' reflections on said problems, and post interviews. Data analysis was done based on [Hazzan, O. & Zazkis, R. (2005). Reducing abstraction: The case of school mathematics. Educ. Stud. Math. 58(1), 101-119]. Analysis of students' written solutions revealed that transitions among the solution methods have major effect on abstraction levels. Elevation and reducing abstraction is a dynamic process.

• 정보처리학회논문지D
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• 제10D권1호
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• pp.23-32
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• 2003

대규모 데이터 마이닝 환경에서는 이질적인 데이터베이스 혹은 파일 시스템으로부터 분석 대상 데이터를 수집하는 경우가 일반적이므로, 수집된 데이터가 서로 다른 추상화 수준(abstraction level)으로 표현되기 마련이다, 본 논문에서는 기존의 결정 트리(decision tree)를 서로 다른 추상화 수준으로 표현된 데이터에 적용할 때, 분류상 모순이 일어날 수 있음을 보이고, 그에 대한 해결방안을 제시한다. 제안하는 방법은 데이터 간에 존재하는 일반화/세분화 관련성을 결정 트리의 구축 단계는 물론, 클래스 할당 단계에도 반영하여 데이터간의 의미적 연관성을 효과적으로 활용할 수 있도록 한다. 아울러 실제 데이터에 기반을 둔 실험을 통해, 제안한 방법이 기존 방법보다 분류 오류율을 현저히 줄일 수 있음을 보인다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.135-138
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• 2005

HDL(Hardware Description Language) is the most important modem tools used to describe hardware, and becomes important as we move to higher levels of abstraction. The HDL has been made brisk use of in analog design, MEMS device[1-2], process related field as well as digital design. The most important characteristics of HDL is Abstraction which is the strongest tool that extend greatly designer's design ability. In this paper by the Modelling Continuum with hierarchical structure of abstraction, we apply UML(Unified Modeling Language) to SoC Design with HDL UML makes an easy and visual description of the various levels of abstraction, and gives designers good flexible modeling capabilty for SoC Design.

• 한국콘텐츠학회논문지
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• 제11권4호
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• pp.414-427
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• 2011

본 연구는 컷오프 수준에 따라 활성화 셀(cell) 수와 래더(ladder) 수 등의 통계량의 변화를 살펴보고, 컷오프 수준의 변화에 따른 가치 맵이 어떻게 변화하는지를 제시하며, 주어진 조건(100명의 응답자에게 최대 5개의 중요한 속성을 선택하도록 하여 가치사슬을 만든 후 이를 이용하여 가치 맵을 그렸을 경우)하에서 정보손실을 최소화하면서 설명력이 있는 최적의 컷오프 수준 결정과 이에 따른 가치 맵을 표현하고자 한다.

• 로봇학회논문지
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• 제2권3호
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• pp.262-269
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• 2007

Hierarchical Planning based on Abstraction of World Elements and Operators(HiPAWO) is proposed for mobile robots task planning, where abstraction of world elements is used for hierarchical planning and abstraction of operators is used for hierarchical decomposition of abstracted actions. Especially, a hierarchical domain theory based on JAH(Joint of Action Hierarchy)-graph is proposed to improve efficiency of planning, where a number of same actions are included in both adjacent hierarchical levels of domain theories to provide relationships between adjacent hierarchical levels. To show the validities of our proposed HiPAWO, experimental results are illustrated and will be compared with two other classical planning methods.

• 한국수학교육학회지시리즈A:수학교육
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• 제42권3호
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• pp.303-325
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• 2003

This study sought to provide an explanation of university students' concept understanding on the infinity and infinite process and utilized a psychological constructivist perspective to examine the differences in transitions that students make from static concept of limit to actualized infinity stage in context of problems. Open-ended questions were used to gather data that were used to develop an explanation concerning student understanding. 47 university students answered individually and were asked to solve 16 tasks developed by Petty(1996). Microgenetic method with two cases from the expert-novice perspective were used to develop and substantiate an explanation regarding students' transitions from static concept of limit to actualized infinity stage. The protocols were analyzed to document student conceptions. Cifarelli(1988)'s levels of reflective abstraction and Robert(1982) and Sierpinska(1985)'s three-stage concept development model of infinity and infinite process provided a framework for this explanation. Students who completed a transition to actualized infinity operated higher levels of reflective abstraction than students who was unable to complete such a transition. Developing this ability was found to be critical in achieving about understanding the concept of infinity and infinite process.

• ETRI Journal
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• 제46권3호
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• pp.501-512
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• 2024

With an explosive increase of data produced annually, researchers have been attempting to develop solutions for systems that can effectively handle large amounts of data. Single-operating-system (OS) non-uniform memory access (NUMA) abstraction technology is an important technology that ensures the compatibility of single-node programming interfaces across multiple nodes owing to its higher cost efficiency compared with scale-up systems. However, existing technologies have not been successful in optimizing user performance. In this paper, we introduce a single-OS NUMA abstraction technology that ensures full compatibility with the existing OS while improving the performance at both hypervisor and guest levels. Benchmark results show that the proposed technique can improve performance by up to 4.74× on average in terms of execution time compared with the existing state-of-the-art opensource technology.

• 한국CDE학회논문집
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• 제6권3호
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• pp.157-168
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• 2001

The description of enterprise activities is the basis fur process improvement and information system building. To describe such activities, it is necessary to model the enterprise activities from the abstraction level to the implementation level in a stepwise and integrated form. For this reason, several modeling approaches have been proposed. However, most of them lacked the stepwise or integration aspects although some of them covered overall levels. This study proposes the hierarchical modeling approach for integrating the enterprise activity model from the abstraction level to the implementation level systematically. It is composed of five modeling levels such as function level, process level, task level, document workflow level, and event flow level. This study discusses the definition and characteristics of each level and compare our modeling frame with other modeling methodologies in case study.

• 전자공학회논문지C
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• 제34C권6호
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• pp.1-10
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• 1997

By considering low power design at higher levels of abstraction rather than at lower levels of abstraction, we can apply various transformation techniques to a system design with wider view and obtain much more effective power reduction with less cost and effort. In this paper, a transformation technique, called power - conscious loop folding is proposed for high level synthesis of a low power system.Our work is focused on reducing the power consumed by functional units in adata path dominated circuit through the decrease of switching activity. Te transformation algorithm has been implemented and integrated into HYPER, a high level synthesis system for experiments. In our experiments, we could achieve a pwoer reduction of up to 50% for data path dominated circuits.

• Journal of information and communication convergence engineering
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• 제11권2호
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• pp.112-117
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• 2013

In order to reuse a register transfer level (RTL)-based IP block, it takes another architectural exploration in which the RTL will be put, and it also takes virtual platforms to develop the driver and applications software. Due to the increasing demands of new technology, the hardware and software complexity of organizing embedded systems is growing rapidly. Accordingly, the traditional design methodology cannot stand up forever to designing complex devices. In this paper, I introduce an electronic system level (ESL)-based approach to designing complex hardware with a derivative of SystemVerilog. I adopted the concept of reuse with higher levels of abstraction of the ESL language than traditional HDLs to design multiplication server farms. Using the concept of ESL, I successfully implemented server farms as well as a test bench in one simulation environment. It would have cost a number of Verilog/C simulations if I had followed the traditional way, which would have required much more time and effort.