• Title/Summary/Keyword: ATM switching system

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Multicast Routing Algorithm under Cell Replication Limits of Switches in ATM Networks (ATM 망에서 교환기의 셀 복제 능력을 고려한 멀티캐스트 라우팅 알고리듬)

  • 주종혁
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.23 no.61
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    • pp.33-39
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    • 2000
  • In this paper, we present an algorithm for the multicast routing problem when there exit the cell replication limits of ATM switching nodes. This problem can be formulated as a Degree Constrained Minimum Steiner Tree Problem(DCSP). The proposed algorithm is a modification of the shortest path heuristic originally devised for minimum Steiner tree problem. From the experimental results, it can be seen that our algorithm is efficient to obtain a near optimal solution with comparatively low computational time.

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Human domain paradigm for man-machine interface system design in ATM switching system development (ATM 시스템 개발에서의 인간-기계 계면체계 설계를 위한 인간영역 정의)

  • Park, Beom;Kim, Bong-Su;Lee, Byung-Yoon;Kim, Han-Gyung
    • Proceedings of the ESK Conference
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    • 1993.10a
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    • pp.56-61
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    • 1993
  • 본 연구는 ATM 시스템 개발에 있어서 인간-기계 계면체계에 더 적합한 설계 계획을 위한 새로 운 인간영역에 관한 정의이다. ATM은 광대역 종합정보통신망에 사용될 비동기 전송방식 교환시 스템으로 인간-기계 시스템 상호작용에 있어서 인간 운용자에게 높은 신뢰성과 양호한 적응성이 강력히 요구된다. 대형 통신시스템의 설계영역 정의에 대한 이런 관점은 다음과 같은 관련 영역 을 포함하고 있다: 인간-기계 시스템의 구성요소: 객체지향적 설계 계획: 인간 프로세서 체계 모 형의 영역: 인지작용의 원칙: 인간오류 행위의 영역 등 이다. 또한, 제안하는 지식베이스 체계 는 인간-기계 계면기능의 평가에 있어서 인간지향적 오류의 진단분석을 유용하게 할 수 있다. 이 적합한 인간지향적 영역 정의는 ATM 통신 교환체계의 운용보전에 있어서 적합한 설계영역을 위한 주요한 지식기반이 될 것이며, 사용자에 편리한 운용체계의 개발로 효율적인 성과를 가져 올 것 이다.

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Implementation of outgoing packet processor for ATM based MPLS LER System

  • Park, Wan-Ki;Kwak, Dong-Yong;Kim, Dae-Yong
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1851-1854
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    • 2002
  • The Internet with conventional routing scheme cannot meet user demands driven from drastic growth in the Internet user and various service and traffic type. MPLS(Multi Protocol Label Switching) was introduced to the Internet fur solution to resolve this problem. MPLS is a paradigm to integrate higher layer’s software routing functions including layer-3 routing with layer-2 switching. But, the exponential growth of Internet traffic brings out of label space. One scalable solution to cope with this problem is to introduce flow merge technique, i. e. a group of flows is forwarded using the same label. Specially, IETF(Internet Engineering Task Force) recommends that ATM based MPLS system may include VC merge function, so it is scalable to increase of internet traffic. We implemented the MPLS LER system that includes the look-up and forwarding function in incoming path and VC merging function and limited traffic management function in outgoing path. This paper describes the implementation of the LER’s outgoing parts.

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Output Buffered ATM Switch based IP Switching System with Traffic Type Merging Function and Its Traffic Handling Characteristics (트래픽 유형별 VC-Merging 기능을 갖는 출력 버퍼형 ATM 스위치 기반 IP 교환 방식 및 특성)

  • Han, Chi-Moon;Lee, Sang-Hwa
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.10
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    • pp.41-48
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    • 2001
  • It is necessary to provide the QoS guaranteed end to-end routing services using the internet protocol through the connectionless network based on high speed network. From the above necessities, this paper classified the existing traffic into two type traffics such as real time traffics and non real time traffics and proposes the ATM based IP switching method with traffic type VC merging which allows many routes according to traffic type to be mapped to the same VC label. And this paper suggests the optimum switching architecture through simulation and performance analysis of proposed VC merging output module. From the simulation results, we confirmed the performance of the proposed method better than existing VC merging system under mixed traffic circumstances.

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Development of an ATM switch simulator (ATM 스위치 시뮬레이터의 개발)

  • 변성혁;김덕경;이승준;허정원;선단근;박홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.9
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    • pp.1209-1218
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    • 1995
  • In this paper, we develope an ATM switch simulator in order to evaluate the HAN/B-ISDN ATM switch currently being developed by ETRI. It models the basic cell switching functions of the target ATM switch with priority control and multicasting features and it also supports such various traffic models as random or bursty traffic, balanced or unbalanced traffic, multicast traffic models. Using this simulator, we can evaluate the performances of the ATM switch in terms of various performance indices, i.e. cell delay, cell loss probability, etc., and this simulator can be utilized in the system parameter tunings such as the common buffer size and address buffer size.

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Design and Implementation of Performance Management in ATM based MPLS LER System (ATM 기반 MPLS LER 시스템의 성능 관리 기능 설계 및 구현)

  • Kim, Mi-Hee;Lee, Jae-Sup
    • Annual Conference of KIPS
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    • 2000.10b
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    • pp.1047-1050
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    • 2000
  • 차세대 인터넷의 요구 사항을 만족시켜 주기 위하여 IETF에서는 MPLS(Multiprotocol Label Switching) 기술을 표준화하고 있다. MPLS는 ATM과 흡사한 레이블을 사용하여 레이블 스왑핑에 의한 포워딩을 수행하므로 IP 패킷을 매우 빠른 속도로 전달해 줄뿐만 아니라 ATM 망에서의 다양한 질의 서비스 제공을 가능하게 하여 기존의 ATM 망의 활용도를 증가시킨다. 본 논문에서는 현재 개발 진행 중인 ATM 스위치 기반 MPLS LER 시스템에서 성능 관리 기능을 위한 구조를 제시하고, 구현 내용을 기술한다. 본 시스템에서 제공되는 통계 대상에는 MPLS 연결인 LSP 트래픽과 Non_ MPLS 도메인의 연결인 가입자 트래픽 및 제어 트래픽 등이 있다.

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Message Routing Method for Inter-Processor Communication of the ATM Switching System (ATM 교환기의 프로세서간통신을 위한 메시지 라우팅 방법)

  • Park, Hea-Sook;Moon, Sung-Jin;Park, Man-Sik;Song, Kwang-Suk;Lee, Hyeong-Ho
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.289-440
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    • 1998
  • This paper describes an interconnection network structure which transports information among processors through a high speed ATM switch. To efficiently use the high speed ATM switch for the message-based multiprocessor, we implemented the cell router that performs multiplexing and demultiplexing of cells from/to processors. In this system, we use the expanded internal cell format including 3bytes for switch routing information. This interconnection network has 3 stage routing strategies: ATM switch routing using switch routing information, cell router routing using a virtual path identifier (VPI) and cell reassembly routing using a virtual channel indentifier (VCI). The interconnection network consists of the NxN folded switch and N cell routers with the M processor interface. Therefore, the maximum number of NxM processors can be interconnected for message communication. This interconnection network using the ATM switch makes a significant improvement in terms of message passing latency and scalability. Additionally, we evaluated the transmission overhead in this interconnection network using ATM switch.

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A Survey and Implementation of UNI Signalling Protocol in ACE64 Switching System (ATM 교환 시스템에서 가입자-망 간 신호 프로토콜 고찰 및 구현)

  • 오문균;한미숙주성
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.309-312
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    • 1998
  • B-ISDN에서 교환 노드로서 동작하게 될 ATM 교환 시스템은 사용자 단말이 ITU-T 신호 권고안을 사용하는 단말과 ATM Forum 신호규격을 사용하는 단말이 공존할 수 있다는 전제하에 모든 신호 프로토콜을 다 수용할 수 있는 호/연결 제어 소프트웨어가 요구된다. 따라서 이 논문에서는 ITU-T 신호 프로토콜과 ATM Forum 신호 프로토콜에 대하여 신호 메세지, 정보 요소, 신호 능력을 비교 검토하여 정리하였다. 이 비교 검토 결과에 따라서 ITU-T 1.2931, 1.2971, ATM Forum UNI3.1 신호 프로토콜을 처리하는 기능 블럭과 UNI4.0 신호프로토콜을 처리하는 기능 블럭을 분리하여 신호 프로토콜을 처리하도록 가입자 호/연결 제어 소프트웨어를 구현하였다.

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Implementation and performance evaluation of SS No.7 in B-ISDN networks (B-ISDN 망에서 공통선 신호 기능의 구현 및 성능 평가)

  • Rhee, Woo-Seop;Kim, Hwa-Suk;An, Yoon-Young;Kwon, Yool
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1397-1408
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    • 1998
  • Service networks for the future communication networks will be combined by the B-ISDN networks. These service networks also will use SS No.7 as the signaling transport network for the control of user requriement service. Therefore, ITU-T recommended B-ISDN signaling layers for SS No.7 as a substitute for N-ISDN MTP signaling layer. In this paper, we propose the implementation structure and describe the characteristics and functions of each signaling layer of SS No.7, which are adapted to ATM switching system, and evaluate a performance. The structure of SSCOP transmission buffer using a linked list and an unit frame length is proposed for SAAL layer and the implementation structure and internal routing method according to the ATM switching system are also proposed for MTP-3b layer. Additionally, we propose the ISUP/B-ISUP level interworking structure using only associated mode, which are presented in the first stage of B-ISDN as the effective internatworking structure of SS No.7 for the circuit related signaling network between the existing N-ISDN networks and B-ISDN networks.

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Design of Switching Fabric Supporting Variable Length Packets (가변 길이 패킷을 지원하는 스위칭 패브릭의 설계)

  • Ryu, Kyoung-Sook;Kim, Mu-Sung;Choe, Byeong-Seog
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.3
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    • pp.311-315
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    • 2008
  • The switching fabric used to make high speed switching for packet transfer between input and output interface in recent internet environments. Without making any changes in order to remain ATM switching fabric, the existing structures should split/reassemble a packet to certain size, set aside cross-point buffer and will put loads on the system. In this paper, we proposed a new switch architecture, which has separated data memory plane and switching plane packet data will be stored on the separate memory structure and simultaneously only the part of the memory address pointers can pass the switching fabric. The small mini packets which have address pointer and basic information would be passed through the switching fabric. It is possible to achieve the remarkable switching performance than other switch fabrics with contending variable length packets.