• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.7
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• pp.19-30
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• 1992

In this paper, a new large scale ATM switch architecture for Broadband ISDN is presented and its performance is analyzed mathematically. The proposed two-stage ATM switch consists of a sorting network and several unit switches. The proposed switch is self-routing and nonlocking. Its maximum through put is 100% without speed up which other output buffered switch needs. The hardware complexity mainly depends on that of a sorting network, but sorting network is easy to be implemented to VLSI because of its regularity in the structure.

• The KIPS Transactions:PartC
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• v.8C no.4
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• pp.389-396
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• 2001

기존의 라우터 기반의 패킷 스크리닝 방식은 ATM 네트워크 상에서는 패킷 수준의 스크리닝 기능의 적용을 위하여 SAR(Segmentation And Reassembly) 과정을 필요로 하기 때문에 고속의 셀 처리를 수행하는 ATM Switch의 셀 처리 속도를 저하시킨다는 문제점을 안고 있다. 본 논문에서는 셀 스크리닝 방식에 기반한 병렬 처리 구조의 ATM Firewall Switch를 제안한다. 제안된 Enhanced ATM Firewall Switch는 셀 단위로 분할된 패킷의 1, 2번 셀들에 대한 검사만을 통하여 스크리닝 기능을 수행하기 때문에 셀 단위의 스크리닝 수행이 가능하며, 정책 캐쉬의 도입을 통해 셀 스크리닝 수행속도를 향상하였다. 또한 독립적인 User Cells Filter 기능 블록의 설계를 통하여 병렬 처리 구조의 셀 스크리닝 수행이 가능하도록 구성하여 셀 지연 시간을 최소화하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1360-1371
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• 1998

There are many implementation methods according to models integrating TMN Agent into an ATM switch. In this paper, we evaluate the integrating models for integrating the Agent into an ATM switch in the aspects of the size of MIB(Management Information Base), the internal protocol profiles and the facility of implementation. Based on the evaluation, we choose an integrating model and implment the Agent. To ensure merit of the model, we propose an interface for exchanging management information between the Agent and an ATM switch. We also show the feasibility of our Agent system through some filed testes for the average processing time.

• Korean Management Science Review
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• v.10 no.1
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• pp.139-156
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• 1993

Various ATM switches have been proposed since Asynchronous Transfer Mode (ATM) was recognized as appropriate for implementing broadband integrated services digital network (BISDN). An ATM switching network may be evaluated on two sides : traffic performances (maximum throughput, delay, and packet loss probability, etc.) and structural features (complexity, i.e. the number of switch elements necessary to construct the same size switching network, maintenance, modularity, and fault tolerance, etc.). ATM switching networks proposed to date tend to show the contrary characteristics between structural features and traffic performance. The Knockout Switch, which is well known as one of ATM switches, shows a good traffic performance but it needs so many switch elements and buffers. In this paper, we propose an input and output buffered Knockout Switch for the purpose of reducing the number of switch elements and buffers of the existing Knockout Switch. We analyze the traffic performance and the structural features of the proposed switching architecture through a discrete time Markov chain and compare with those of the existing Knockout Switch. It was found that the proposed architecture could reduce more than 40 percent of switch elements and more than 30 percent of buffers under a given requirement of cell loss probability of the switch.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.11
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• pp.1143-1153
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• 1991

In this paper, we proposed a new ATM switch structure which is based on the GAMMA network, proving multipath between an input and an output port. The size of the proposed new ATM switch will be smaller than the switches based on the BANYAN network, which includes the Sorting network to resolve the blocking in the switch fabric. Also, the validity and the utility of the proposed switch structure is verified through a simulation method.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.9
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• pp.1209-1218
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• 1995

In this paper, we develope an ATM switch simulator in order to evaluate the HAN/B-ISDN ATM switch currently being developed by ETRI. It models the basic cell switching functions of the target ATM switch with priority control and multicasting features and it also supports such various traffic models as random or bursty traffic, balanced or unbalanced traffic, multicast traffic models. Using this simulator, we can evaluate the performances of the ATM switch in terms of various performance indices, i.e. cell delay, cell loss probability, etc., and this simulator can be utilized in the system parameter tunings such as the common buffer size and address buffer size.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.130-133
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• 1998

A imput buffer typed ATM switch and an appropriate cell-scheduling algorithm are necessary for avoiding output blocking and internal blocking respectively. The algorithm determining a set of non-blocking data cells from the queues can greatly affect on the switch's throughput as well as the behavior of the queues. In this paper bit pattern optimization combined with the Token method in presented in order to improve the performance of ATM switch. The digital Hopfield neural cell scheduler is designed and used for the maximum numbers of cells in real-time

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.8
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• pp.45-55
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• 1997

To design a ATM Switch which ahs advantages in high sped packet switching, it is essential to set multiple paths between input ports and output ports and to design a new packet transfer technique on that paths for decreasing Packet Loss by conflicts in internal Switch Plane. We propose new packet transfer method, Alternate Path Transfer Mechanism by Dynamic Bypass Transfer Method which can solve conflict problem in Banyan network easily. Proposed ATM Switch consists of Banyan networks, Input/Ouput Port, Bypass Link, and Bypass Link Controller. Packets caused conflicts in SEs have another chances of packet transfer over alternate switching planes by using this mechanism.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8B
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• pp.1401-1411
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• 1999

Due to the increase of multimedia services, multicasting is considered as important design factor for ATM switch. To resolve the traffic expansion problem that is occurred by multicast in multistage interconnection networks, this paper proposes the multicast switch using a high-speed bus and a shared memory switch. Since the proposed switch uses a high-speed time division bus as a connection medium and chooses a shared memory switch as a basic switch module, it provides good port scalability. The traffic arbitration scheme enables internal non-blocking. By simulation we proves a good performance in the data throughput and the cell delay.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.10
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• pp.40-50
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• 1999

The novel network architecture is recently required to accommodate a variety and intelligence of communication services. It is also required to provide customized network functions and to efficiently satisfy a various user's requirements. Accordingly, open network architecture based on ATM transport network features has been mainly studied in communication network. This paper evaluates the VSN(Virtual Switch Network) characteristics in the call processing of IMT-2000 switching system, which is composed of VSN instead of ATM switch network. VSN means switch network which is composed of ATM transport network. As a result, this paper proposes new VSN based ATM-MSC architecture with integrated call and connection control systems. and evaluates call processing delay characteristics using call process procedures. Internal call processing delay is increased approximately 3.5msec than the conventional ATM switching system. The experimental values applied in the analysis condition are the load 0.8, and the 100km distance between CCCPs(Call and Connection Control Processors) and VSNs. It is confirmed that the VSN has the potentiality in the practical implementation.