• Journal of Biomedical Engineering Research
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• v.20 no.5
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• pp.573-579
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• 1999

본 논문은 2채널 센서를 이용한 펄스 옥시메터의 산소포화도 계산 모델의 설계 및 분석에 관한 것이었다. 또한 Beer Lambert 법칙에 의거하여 기존 알고리즘 및 새로운 알고리즘들을 이론적으로 분석하였다. 제안된 알고리즘은 손가락을 투과한 2개의 채널에서 나온 광신호를 각각 직류성분 Adc 와 맥동성문 Aasin wt. 잡음성분 Ahnoise , ALnoise 등으로 모델링한다. 모델링 되어진 광신호를 맥동성분이 적분비를 사용하여 고주파 동잡음인 AHnoise 를 제거한 후 각각 산소포화도 계산을 위한 상관계수 그래프를 구한다. 또한 2개의 채널에서 적분비를 사용하여 구해진 상관계수 그래프를 사용하여 산소농도를 추출하는 방법에 관하여 기술하였다. 맥동성분비와 관혈적인 측정에 의한 혈중 산소포화도와의 상관관계 그래프의 선형성을 확보하기 위하여 펄스 옥시메터 시뮬레이터 오차범위를 고려해 75~100%상이의 산소포화도를 중점적으로 관측하였고, 4주기로 면적계산주기를 결정하여 실험하였다. 본 연구에서 제안된 알고리즘의 성능평가는 맥동성분의 적분비를 이용한 방법과 비교하였다. 비교결과는 4주기의 면적계산 주기를 가졌을 때 기존의 방식보다 평균오차가 0.7%정도 향상되었으며, 회귀적선의 신뢰도를 보여주는 결정계수 ${\gamma}$$^2$도 0.995로 기존의 방식에서 나온 0.979보다 더 좋은 결과를 얻을 수 있었다. 따라서 2채널을 이용한 방법이 A Lnoise 제거와 성능면에서 우수하다는 결론을 얻을 수 있었다.

• Journal of Sensor Science and Technology
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• v.31 no.2
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• pp.115-119
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• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.12
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• pp.1380-1393
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• 2010

This paper presents a design, fabrication and the test results of planar active electronically scanned array(AESA) radar prototype for airborne fighter applications using transmit/receive(T/R) module hybrid technology. LIG Nex1 developed a AESA radar prototype to obtain key technologies for airborne fighter's radar. The AESA radar prototype consists of a radiating array, T/R modules, a RF manifold, distributed power supplies, beam controllers, compact receivers with ADC(Analog-to-Digital Converter), a liquid-cooling unit, and an appropriate structure. The AESA antenna has a 590 mm-diameter, active-element area capable of containing 536 T/R modules. Each module is located to provide a triangle grid with $14.7\;mm{\times}19.5\;mm$ spacing among T/R modules. The array dissipates 1,554 watts, with a DC input of 2,310 watts when operated at the maximum transmit duty factor. The AESA radar prototype was tested on near-field chamber and the results become equal in expected beam pattern, providing the accurate and flexible control of antenna beam steering and beam shaping.

• Journal of Practical Engineering Education
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• v.8 no.2
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• pp.111-120
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• 2016

Education equipment for field programmable gate array (FPGA) design of sensor-based IOT (Internet Of Thing) system is introduced. Because sensors have different interfaces, several types of interface controller on FPGA need. Using this equipment, several types of interface controller, which can control ADC (analog-to-digital converter) for analog sensor outputs and $I^2C$ (Inter-Integrated Circuit), SPI (Serial Peripheral Interface Bus), and GPIO (General-Purpose Input/Output) for digital sensor outputs, can be designed on FPGA. Image processing hardware using image sensors and display controller for real and image-processed images or videos can be design on FPGA chip. This equipment can design a SOC (System On Chip) consisting of a hard process core on Linux OS and a FPGA block for IOT system which can communicate with wire and wireless networks. Using the education equipment, an example of hardware design using image sensor and accelerometer is described, and an example of syllabus for "Digital system design using FPGA" course is introduced. Using the education equipment, students can develop the ability to design some hardware, and to train the ability for the creative capstone design through conceptual, partial-level, and detail designs.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.7
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• pp.1302-1308
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• 2010

In this study, Zigbee Sensor Node to transmit harmful gases CO and $CO_2$ information using wireless communication within the ground and underground structures were developed. Wireless communication protocol was used Zigbee Stack included IEEE 802. 15.4 MAC protocol. For wireless transmission of detected harmful gas signal from ADC of MCU was implemented Zigbee Sensor Node that was developed protocol using Serial-Port-Profile(SPP) here. The proposed Zigbee Sensor Node was verified transmission distance from experiments. Transmission distance was into 90m in experiments. Distance experiments were measured at 10m intervals using sine & pulse wave input signal at indoors. The proposed Route Sensor Node was applied mesh routing protocol. When built up USN(Ubiquitous Sensor Network)using Route Sensor Node, transmission distance was not limited. On the experimental results, harmful gas values between direct measurements and USN measurements were consistent. The semiconductor CO sensor and N-DIR $CO_2$ sensor module as a harmful sensor was used. Therefore, the proposed Zigbee Sensor Node was verified about reliability and validity to build USN for transmission of harmful gas information.

• Journal of Korean Academy of Oral and Maxillofacial Radiology
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• v.22 no.1
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• pp.117-127
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• 1992

This investigation was performed to test the readability of the video based digital radiography, that can be applied clinically, compared with the periapical radiograph. The experiments were performed with IBM-PC/AT compatible, video camera and ADC (analog-digital converter). And spatial resolution was 512 X 480 with 256 (8 bit) gray levels. The radiographs obtained by using variable steps of exposure time were digitized. and then the digital images were analyzed. The obtained results were as follows: 1. There was no remarkable difference in readability between the radiographs and their digital images. However, under over exposure the digital images were superior to the radiographs in readability and vice versa. 2. As the exposure time was increased, the gray level of the digital image was decreased proportionally. 3. The correlation beween the regions of interest and the aluminum step wedges were relatively close; R=0.9965 (p <0.001).

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1207-1210
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• 1998

차세대 DVD system의 audio 규격인 Dolby AC-3를 구현하는 방법으로 DSP 프로세서인 TMSC80을 사용하여 실시간 처리 가능한 하드웨어 바탕의 firmware 소프트웨어를 개발하는 방법으로 구현하고자 한다. 본 논문에서는 먼저 TMS320C80을 바탕으로 한 하드웨어 구현에 관해 논의한다. 하드웨어의 구조는 TMS320C80과 시스템 메모리로의 DRAM, 오디오 입력부인 ADC, 입력 데이터를 효과적으로 사용하기 위한 FIFO menory, 오디오 출력용인 dac, 디버깅 및 통신포트로 USB, RS-232,LPT와 MPEG-2 encoding보드 등 다른 보드와 연계를 위한 local-bus를 위한 dual port ram으로 구성된다. 오디오 입력은 최대 24bit 48kHz sampling까지 받을 수 있다.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.249-250
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• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

• Investigative Magnetic Resonance Imaging
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• v.20 no.4
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• pp.250-253
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• 2016

Acute Japanese encephalitis (JE) is an endemic viral infectious disease in various parts of Far East and Southeast Asian countries including Korea. Bilateral thalami are the most common involving sites in JE. Other areas including the basal ganglia, substantia nigra, red nucleus, pons, cerebral cortex and cerebellum may be also involved. We report an extremely unusual brain diffusion-weighted MR imaging (DWI) findings in a 53-year-old man with serologically proven JE involving unilateral deep gray matter and temporal lobe, which shows multifocal high signal intensities in left thalamus, left substantia nigra, left caudate nucleus and left medial temporal cortex on T2-weighted image and DWI with iso-intensity on apparent diffusion coefficient (ADC) map.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.156-157
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• 2014

본 논문에서는 저전력 12비트 1MSps 연속 근사형 레지스터 아날로그-디지털 변환기를 제안한다. 제안하는 회로는 1.8V의 공급 전압에서 동작하며, Magnachip/SK Hynix $0.18{\mu}m$ CMOS 1Poly-6Metal 공정을 이용하여 설계하였다. 입력신호의 주파수가 100kHz일 때, 설계된 회로는 3.24mW의 낮은 소비전력 특성, $0.56mm^2$의 작은 칩 면적 특성, 70.03dB의 SNDR(Signal-to-Noise Distortion Ratio) 및 11.34비트의 ENOB(Effective Number of Bits) 특성을 보였다.