• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.357-358
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• 2005

Compact power amplifier modules (PAM) for WCDMA/KPCS and GSM/WCDMA dual-band applications based on multilayer low temperature co-fired ceramic (LTCC) substrates are presented in this paper. The proposed modules are composed of an InGaP/GaAs HBT PAs on top of the LTCC substrates and passive components such as RF chokes and capacitors which are embedded in the substrates. The overall size of the modules is less than 6mm $\times$ 6mm $\times$ 0.8mm. The measured result shows that the PAM delivers a power of 28 dBm with a power added efficiency (PAE) of more than 30 % at KPCS band. The adjacent-channel power ratio (ACPR) at 1.25-MHz and 2.25-MHz offset is -44dBc/30kHz and -60dBc/30kHz, respectively, at 28-dBm output power. Also, the PAM for WCDMA band exhibits an output power of 27 dBm and 32-dB gain at 1.95 GHz with a 3.4-V supply. The adjacent-channel leakage ratio (ACLR) at 5-MHz and 10-MHz offset is -37.5dBc/3.84MHz and -48dBc/3.84MHz, respectively. The measured result of the GSM PAM shows an output power of 33.4 dBm and a power gain of 30.4 dB at 900MHz with a 3.5V supply. The corresponding power added efficiency (PAE) is more than 52.6 %.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.2
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• pp.104-110
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• 2019

In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.880-886
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• 2007

We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.