• 마이크로전자및패키징학회지
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• 제19권4호
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• pp.45-50
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• 2012

A family of multi-die DRAM packages was developed that incorporate the full functionality of an SODIMM into a single package. Using a common ball assignment analogous to the edge connector of an SODIMM, a broad range of memory types and assembly structures are supported in this new package. In particular DDR3U, LPDDR3 and DDR4RS are all supported. The center-bonded DRAM use face-down wirebond assembly, while the peripherybonded LPDDR3 use the face-up configuration. Flip chip assembly as well as TSV stacked memory is also supported in this new technology. For the center-bonded devices (DDR3, DDR4 and LPDDR3 ${\times}16$ die) and for the face up wirebonded ${\times}32$ LPDDR3 devices, a simple manufacturing flow is used: all die are placed on the strip in a single machine insertion and are sourced from a single wafer. Wirebonding is also a single insertion operation: all die on a strip are wirebonded at the same time. Because the locations of the power signals is unchanged for these different types of memories, a single consolidated set of test hardware can be used for testing and burn-in for all three memory types.

• 한국실내디자인학회논문집
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• 제16호
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• pp.153-160
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• 1998

The past and present time are consistent thinking process system which composed of single concept not separated concept. It's common concept for interior designer to how to realize the thinking process system in actual present day. So this paper was focused on purpose of establishing for procedural process theory by approaching typological process system in interior design process. Interior design being composed of typological thinking process system has been headed as a critical issue to how to transplant well between the design and typological objects. Also we have to be needed to know for the process of visual expression and verbal ability to be able to extract the designer's elements from it. Through the process of visual expression and verbal ability to be able to extract the designer's elements from it. Through the process of visual transformation and analysis we have to extract concepts with united design objects. From these process it should be followed adequate adjudgment on the extracted fragments' assembly and dissociation methods through physical limitation of elements functionality and feasibility's measurements. Therefore from the morphological designed results reflected to typological concepts finished material detail and texture we should be able to take the integrated thinking process system. Lastly interior designer should be able to check whether it was best choice from the consistent design feedback process to ask whether it contains the conceptual design process and new typological objects without non-conformity between past and present days in interior space. Now we should be asked for development of practical design process to be able to realize above assumptions called "Development and Suceeding of Cultural Value System'. Additionally, we have to continue to develop for our true meaning of interior design process, not repetition of past's imitation.tion.

• 한국CDE학회논문집
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• 제16권3호
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• pp.236-245
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• 2011

Many researchers have recently studied multi-level formulation strategies to solve the MDO problems and they basically distributed the coupling compatibilities across all disciplines, while single-level formulations concentrate all the controls at the system-level. In addition, approximation techniques became remedies for computationally expensive analyses and simulations. This paper studies comparisons of the MDO methods with respect to computing performance considering both conventional sequential and modem distributed/parallel processing environments. The comparisons show Individual Disciplinary Feasible (IDF) formulation is the most efficient for sequential processing and IDF with approximation (IDFa) is the most efficient for parallel processing. Results incorporating to popular design examples show this finding. The author suggests design engineers should firstly choose IDF formulation to solve MDO problems because of its simplicity of implementation and not-bad performance. A single drawback of IDF is requiring more memory for local design variables and coupling variables. Adding cheap memories can save engineers valuable time and effort for complicated multi-level formulations and let them free out of no solution headache of Multi-Disciplinary Analysis (MDA) of the Multi-Disciplinary Feasible (MDF) formulation.

• 대한기계학회논문집A
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• 제30권8호
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• pp.897-905
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• 2006

This study considers an experimental design of disturbance compensation control to improve stabilization performance of main battle tanks. An adaptive non-parametric design technique based on the Filtered-x Least Mean Square(FXLMS) algorithm is applied in the consideration of model uncertainties. The optimal compensator is designed by two-step design procedures: determination of frequency response function of the disturbance compensator which can cancel the disturbance of series of single harmonics by using the FXLMS algorithm and determination of the compensator polynomial which can fit the frequency response function obtained in the first step optimally by using a curve fitting technique. The disturbance compensator is applied to a simple experimental gun-torsion bar-motor system which simulates gun driving servo-system. Along with experimental results, the feasibility of the proposed technique is illustrated. Experimental results demonstrate that the proposed control reduces the standard deviation of stabilization error to 47.6% that by feedback control alone. The directional properties of the FXLMS Algorithm such as the direction of convergence and its convergence speed are also verified experimentally.

• 한국통신학회논문지
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• 제15권3호
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• pp.197-212
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• 1990

빠른 설계 시간 및 재 설계 가능성 부여 등에 주안점을 두어 고성능의 단일 칩 16-bit data path를 설계하였다. 원칙적인 설계 방법의 체계적인 연구를 위하여 module화의 개념을 근간으로한 설계방법을 도입하였으며, 이에 따라 각 내부블럭이 bus에 연결되어 독립적으로 동작하는 subsystem이 되도록 이를 결합하여 전체 시스템의 설계를 완성하였다. 시스템은 data path이다. Data path는 16-bit의 데이터를 처리하는 부분으로 ALU(Arithmetic Logic Unit), register file, barrel shifter 및 bus 회로로 구성된다. 이 회로에서의 게이트의 폭과 길이는 spice2를 사용하여서 결정하였다. 회로 시뮬레이션의 결과는 기대하였던 회로 특성과 잘 일치하였다.

• ETRI Journal
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• 제40권4호
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• pp.483-498
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• 2018

Nowadays, with progresses in robotic science, the design and implementation of a mechanism for human-robot interaction with a low workload is inevitable. One notable challenge in this field is the interaction between a single human and a group of robots. Therefore, we propose a new comprehensive framework for single-human multiple-robot remote interaction that can form an efficient intelligent adaptive interaction (IAI). Our interaction system can thoroughly adapt itself to changes in interaction context and user states. Some advantages of our devised IAI framework are lower workload, higher level of situation awareness, and efficient interaction. In this paper, we introduce a new IAI architecture as our comprehensive mechanism. In order to practically examine the architecture, we implemented our proposed IAI to control a group of unmanned aerial vehicles (UAVs) under different scenarios. The results show that our devised IAI framework can effectively reduce human workload and the level of situation awareness, and concurrently foster the mission completion percentage of the UAVs.

• 한국통신학회논문지
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• 제21권6호
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• pp.1596-1603
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• 1996

A single body type of fiber-optic current and voltae sensor using a rare earth doped YIG and a bismuth silicon oxide single crystsl is proposed, which is used for simultaneous measurement of the AC electric current and AC electric voltage over the trasmission lines. Experimental results showed that the fiber-optic current sensor has the maximum 7.5% error within the current range of 0A to 400A, and the fiber-optic voltage sensor has the maximum 0.87% error within the current range of 0V to 400V. The output waveforms of proposed fiber-optic sensor system has a good agreement with output waveforms of conductor current and voltage. Experimental results proved that the output of fiber-optic current sensor is not affected by the electric voltage applied to the fiber-optic voltage sensor, and also, that the output of fiber-optic voltage sensor is not affected by the electric current applied to the fiber-optic current sensor.

• 한국정보전자통신기술학회논문지
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• 제14권5호
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• pp.385-393
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• 2021

본 논문에서는 차량 멀티코어 프로세서를 통한 ESC(Electronic Stability Control) 시스템을 위한 멀티코어 기반 제어기를 제시한다. 차량용 멀티코어 프로세서와 ESC 시스템의 아키텍처를 고려할 때 ESC 소프트웨어의 전체 수행 시간은 멀티코어에 최적화되어 있다. 일반적으로 차량용 멀티코어 시스템에서는 코어 간 동기화, 멀티코어에 대한 테스크 할당, 코어 종속 변수에 대한 메모리 할당을 고려해야 한다. 본 논문에 사용된 ESC 시스템은 초기화, SlipRatio 계산, YawRate 계산, ABS, 통신으로 구성된다. 제안된 설계 방법을 기반으로 싱글코어 프로세서는 멀티코어 프로세서로 확장된다. ESC 시스템은 기능 모듈 할당, 세마포어, 인터럽트, 코어 별 변수 할당과 같은 멀티코어 최적화 방법을 사용하여 멀티코어 제어기로 재설계된다. 실험 결과로 멀티코어 프로세서의 수행 시간이 싱글코어 프로세서에 비해 59.7% 단축되었다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제14권2호
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• pp.631-653
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• 2020

Sign language is a natural, visually oriented and non-verbal communication channel between people that facilitates communication through facial/bodily expressions, postures and a set of gestures. It is basically used for communication with people who are deaf or hard of hearing. In order to understand such communication quickly and accurately, the design of a successful sign language translation system is considered in this paper. The proposed system includes object detection and classification stages. Firstly, Single Shot Multi Box Detection (SSD) architecture is utilized for hand detection, then a deep learning structure based on the Inception v3 plus Support Vector Machine (SVM) that combines feature extraction and classification stages is proposed to constructively translate the detected hand gestures. A sign language fingerspelling dataset is used for the design of the proposed model. The obtained results and comparative analysis demonstrate the efficiency of using the proposed hybrid structure in sign language translation.

• Journal of Electrical Engineering and Technology
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• 제10권1호
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• pp.30-40
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• 2015

For a shunt power quality controller (SPQC) the DC side voltage value which is closely related to the compensation performance is a significant parameter. Buy so far, very little discussion has been conducted on this in a quantitative manner by previous publications. In this paper, a method to design the DC side voltage of SPQC is presented according to the compensation performance in the single-phase system and the three-phase system respectively. First, for the reactive current and the harmonic current compensation, a required minimal value of the DC side voltage with a zero total harmonic distortion (THD) of the source current and a unit power factor is obtained for a typical load, through the equivalent circuit analysis and the Fourier Transform analytical expressions. Second, when the DC side voltage of SPQC is lower than the above-obtained minimal value, the quantitative relationship between the DC side voltage and the THD after compensation is also elaborated using the curve diagram. Hardware experimental results verify the design method.