• 한국정보처리학회논문지
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• 제5권4호
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• pp.1025-1032
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• 1998

본 논문은 상용 툴인 OrCAD에서 생성한 디지털 회로의 EDIF 네트리스트를 이용하여 디지털 회로를 PLD로 구현하기 위한 PLD 설계 툴을 개발하였다. EDIF 네트리스트를 이용하여 디지털 회로를 PLD로 구현하기 위해 각 셀(cell)간의 연결정보를 추출하는 연결정보 추출기(JIE)오 피드백(feedback)의 존재여부를 검색하는 피드백 노드 검출기(FND), 부울식을 생성하는 등의 알고리즘(BEG)들을 제안하였다. 또한 생성한 부울식을 최소화한 후, 최소화한 부울식의 입출력 변수 개수와 OR 텀의 수와 출력 특성을 고려하여 적합한 PLD 소자를 자동 선정하는 Auto select 기능과 상용 툴인 MyPLD에서 현재 제공하고 있는 PLD들 보다 용량이 큰 EPLD 타입의 GAL6001과 GAL6002의 JEDEC 파일 생성알고리즘도 제안하였다.

• 전자공학회논문지A
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• 제29A권2호
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• pp.88-99
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• 1992

This paper presents an efficient method of mapping Boolean equations to a set of library gates. The proposed system performs technology mapping by graph covering. To select optimal area cover, a new cost function and local area optimization are proposed. Experimental results show that the proposed algorithm produces effective mapping using given library.

• 정보보호학회논문지
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• 제12권2호
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• pp.65-76
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• 2002

신상욱 등은 PKC'98에서 기존 RIPEMD-160, HAVAL, SHA-1와 같은 해쉬 함수의 장점을 이용하여 160비트의 출력 길이를 갖는 새로운 해쉬 함수를 제안하였다.$^{[1]}$ 최근 FSE 2002에서 한 대완 등은 PKC'98에 제안된 해쉬 함수의 부울 함수가 당초 설계자의 의도와는 달리 일부 부울 함수가 SAC(Strict Avalanche Criterian)을 만족하지 않음을 지적하고, 설계자의 의도에 맞게 모든 부울 함수가 SAC의 성질을 만족한다는 가정 하에, $2^{-30}$의 확률로 충돌 쌍을 찾는 공격방법을 제안하였다.$^{[2]}$ 본 논문에서는 위의 방법을 개선하여, PKC'98에서 제안된 해쉬 함수의 origin version의 전체라운드에 대해 2^{-37.13}$의 확률로 충돌 쌍을 찾을 수 있음을 보인다. 그리고 PKC'98에 제안된 해쉬 함수의 문제점이 메시지에 의존한 쉬프트 값의 사용에 있음을 지적한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1965-1966
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• 2008

The manipulation of Boolean functions is a fundamental part of computer science, and many problems in the design and testing of digital systems can be expressed as a sequence of operations. It is mainly a paper of our research on the techniques of Boolean function manipulation using Binary Decision Diagram(BDDs) and their applications for VLSI CAD System. In many practical applications related to digital system design, it is a basic technique to use ternary-valued functions. In this paper, we discuss the methods for representing logical values.

• Journal of the Optical Society of Korea
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• 제9권3호
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• pp.111-118
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• 2005

In this paper, a new optical parallel binary arithmetic processor (OPBAP) capable of computing arbitrary n-bit look-ahead carry full-addition is proposed and implemented. The conventional Boolean algebra is considered to implement OPBAP by using two schemes of optical logic processor. One is space-variant optical logic gate processor (SVOLGP), the other is shadow-casting optical logic array processor (SCOLAP). SVOLGP can process logical AND and OR operations different in space simultaneously by using free-space interconnection logic filters, while SCOLAP can perform any possible 16 Boolean logic function by using spatial instruction-control filter. A dual-rail encoding method is adopted because the complement of an input is needed in arithmetic process. Experiment on OPBAP for an 8-bit look-ahead carry full addition is performed. The experimental results have shown that the proposed OPBAP has a capability of optical look-ahead carry full-addition with high computing speed regardless of the data length.

• 전기의세계
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• 제28권11호
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• pp.37-44
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• 1979

This paper deals with the computer program of finding the minimal sum-of-products for a switching function by using the MASK method derived from the characteristics of the Boolean algebra. The approach differs from the previous procedures in that all the prime implicants are determined only by the bit operation and the minimal sum-of-products are obtained by the modified Petrick method in this work. The important features are the relatively small amount of the run time and the less memory capacity to solve a problem, as compared to the previous computer programs.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1979년도 하계 전자.전기연합학술발표회논문집
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• pp.69-72
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• 1979

This paper deals with the computer method of finding the minimal sum of products for a switching function by using the MASK method derived from the characteristics of the Boolean algebra. The experiments with the program which is dissimilar to the previous computer programs show that the algorithm presented will be more efficient.

• 전자공학회논문지A
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• 제28A권10호
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• pp.847-854
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• 1991

This paper presents a new output phase assignment algorithm which determines the phases of all the nodes in a given boolean network. An estimation function is defined, which is represented by the relation between the literals in the given function expression. A weight function, WT (fi, fj) is defined, which is represented by approximate amount of common subexpression between function fi and fj. Common Subexpression Graph(CSG) is generated for phase selection by the weight function between all given functions. We propose a heuristic algorithm finding subgraph of which sum of weights has maximum by assigning phases into the given functions. The experiments with MCNC benchmarks show the efficiency of the proposed method.

• 전자공학회논문지B
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• 제31B권2호
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• pp.21-27
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• 1994

Linear combination of weighted order statistic(LWOS) filters, which is an extension of stack filters, can represent any Boolean function(BF) or its extension. Which is called the extended BF(EBF). In this paper, we present a procedure for finding an LWOS filter of the simplest type from LWOS filters which are equivalent to a given BF or EBF. In addition, a property that is useful for implementing an LWOS filter is derived and an algorithm for LWOS filtering is presented.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1994년도 추계학술대회 논문집
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• pp.689-694
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• 1994

In this paper, to develop a smart CAD/CAM system for systematically performing from the 3-D solid shape design of products to the CNC cutting operation of products by a machining center, a B-Rep solid modeler is realized based on the half edge data structure. Because the B-Rep solid modeler has the various capabilities related to the solid definition functions such as the creation operation of primitives and the translational and rotational sweep operation, the solid manipulation functions such as the split operation and the Boolean set operation, and the solid inversion function for effectively using the data structure, the 3-D solid shape of products can be easily designed and constructed. Also, besides the automatic generation of CNC code, the B-Rep solid modeler can be used as a powerful tool for realizing the automatic generation of finite elements, the interference check between solids, the structural design of machine tools and robots and so on.