• Convergence Security Journal
• /
• v.12 no.4
• /
• pp.85-90
• /
• 2012

DES is a 64-bit binary, and each block is divided into units of time are encrypted through an encryption algorithm. The same key as the symmetric algorithm for encryption and decryption algorithms are used. Conversely, when decryption keys, and some differences may apply. The key length of 64 bits are represented by two ten thousand an d two 56-bit is actually being used as the key remaining 8 bits are used as parity check bits. The 64-bit block and 56-bit encryption key that is based on a total of 16 times 16 modifier and spread through the chaos is completed. DES algorithm was chosen on the strength of the password is questionable because the most widely available commercially, but has been used. In addition to the basic DES algorithm adopted in the future in the field by a considerable period are expected to continue to take advantage of the DES algorithm effectively measures are expected to be in the field note.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.18 no.6A
• /
• pp.51-61
• /
• 2008

This paper suggests a new way to implement high speed AES on Intel Core2 processors and AMD Athlon64 processors, which are used all over the world today. First, Core2 Processors of EM64T architecture's memory-access-instruction processing efficiency are lower than calculus-instruction processing efficiency. So, previous AES implementation techniques, which had a high rate of memory-access-instruction, could cause memory-bottleneck. To improve this problem we present the partial round key techniques that reduce the rate of memory-access-instruction. The result in Intel Core2Duo 3.0 Ghz Processors show 185 cycles/block and 2.0 Gbps's throughputs in ECB mode. This is 35 cycles/block faster than bernstein software, which is known for being the fastest way. On the other side, in AMD64 processors of AMD64 architecture, by removing bottlenecks that occur in decoding processing we could improve the speed, with the result that the Athlon64 processor reached 170 cycles/block. The result that we present is the same performance of Matsui's unpublished software.

• Journal of Korea Multimedia Society
• /
• v.12 no.5
• /
• pp.644-652
• /
• 2009

New communication environments such as USN, WiBro and RFID have been realized nowadays. Thus, in order to ensure security and privacy protection, various light-weight block ciphers, e.g., mCrypton, HIGHT, SEA and PRESENT, have been proposed. The block cipher mCrypton, which is a light-weight version of Crypton, is a 64-bit block cipher with three key size options (64 bits, 96 bits, 128 bits). In this paper we show that 8-round mCrypton with 128-bit key is vulnerable to related-key rectangle attack. It is the first known cryptanalytic result on mCrypton. We first describe how to construct two related-key truncated differentials on which 7-round related-key rectangle distinguisher is based and then exploit it to attack 8-round mCrypton. This attack requires $2^{45.5}$dada and $2^{45.5}$time complexities which is faster than exhaustive key search.

• Structural Engineering and Mechanics
• /
• v.64 no.1
• /
• pp.59-69
• /
• 2017

The field of fracture mechanics has gained significance because of its ability to address the behaviour of cracks. Predicting the fracture properties of concrete based on experimental investigations is a challenge considering the quasi-brittle nature of concrete. So, there is a need for developing a standard numerical tool which predicts the fracture energy of concrete which is at par with experimental results. The present study is an attempt to evaluate the fracture energy and characteristic length for different grades of concrete using Concrete Damage Plasticity (CDP) model. Indian Standard and EUROCODE are used for the basic input parameters of concrete. Numerical evaluation is done using Finite Element Analysis Software ABAQUS/CAE. Hsu & Hsu and Saenz stress-strain models are adopted for the current study. Mesh sensitivity analysis is also carried to study the influence of type and size of elements on the overall accuracy of the solution. Different input parameters like dilatation angle, eccentricity are varied and their effect on fracture properties is addressed. The results indicated that the fracture properties of concrete for various grades can be accurately predicted without laboratory tests using CDP model.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.9 no.1
• /
• pp.1-10
• /
• 1984

The time division multiplexing PCM encoder which is constructed for an airborne telemetering system is investigated. Selected by program switch, the PCM encoder has 0~64 words/framd($\pm$5V full scale) of allowable analog input channels, 0~30bits(5V$\pm$1V or 0V$\pm$1V dc) of discrete channels, 70 and 140K bits/sec of bit rate and 8~12bits/word of resolution. And filtered output PCM code is NRZ-L and Bi-S through the 5 pole Bessel LPF(f=100kHz), and the maximum accuracy of PCM encoder is $\pm$0.2% of its full scale.

• 제어로봇시스템학회:학술대회논문집
• /
• 1998.10a
• /
• pp.346-351
• /
• 1998

Cutting process has been automated due to progress of CNC and CAD/CAM, but polishing process has been only depended on experiential knowledge of expert. Polishing work for a curved surface die demands simple and repetitive operations but requires much time for its high precision. Therefore it is operated in the handiwork by skilled worker. However the workers intend to avoid gradually polishing work because of the poor environments such as dust and noise. In order to reduce the polishing time and solve the problem of shortage of skilled workers, it has been done some research for an automation of polishing. To automate the polishing process, a 2 axes polishing robot which is attached to a 3 axes machining center has been developed by our previous research. This automatic polishing robot is able to keep the polishing tool normal on the curved surface of die. Therefore its performance of polishing is improved because of always keeping the tool normal on the surface. In this paper, the smaller sized polishing robot is developed to improve polishing performance. And the controller for 2 axes polishing robot is developed. The controller is composed of TMS320C31 with high speed which is 40-ns instruction cycle time, RAM memory with 64K words, digital input with 64 bits, digital output with 32 bits, and D/A converter with 4 channels, which is 12 bits resolution. To evaluate polishing performance of this developed robot, polishing experiment for shadow mask was carried out.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.11 no.4
• /
• pp.251-258
• /
• 1986

There is much redundancy in image data such as TV signals and many techniques to redice it have been studied. In this paper, Hadamard transform is studied through computer simulation and experimental model. Each element of hadamard matrix is either +1 or -1, and the row vectors are orthogonal to another. Its hardware implementation is the simplest of the usual orthogonal transforms because addition and sulbraction are necessary to calculate transformed signals, while not only addition but multiplication are necessary in digital Fourier transform, etc. Linclon data (64$ imes$64) are simulated using 8th-order and 16th-order Hadamard transform, and 8th-order is implemented to hardware. Theoretical calculation and experimental result of 8th-order show that 2.0 bits/sample are required for good quality.

• Journal of Korea Multimedia Society
• /
• v.4 no.2
• /
• pp.182-188
• /
• 2001

In this paper, We proposed a pseudo-random bit sequence generator based on the concept of n-dimensional cellular automata which is a method of analyzing dynamical systems. The proposed generator is designed for using and disusing key. And the key size is variable from 128 bits to 256 bits. The generator was estimated to generate 380Mbits/sec under Pentium MMX 200MHz (64M RAM, Windows 98).

• Proceedings of the IEEK Conference
• /
• 2006.06a
• /
• pp.427-428
• /
• 2006

This paper presents an image fingerprinting scheme for the print-to-capture model performed by a photo printer and digital camera. When capturing an image by a digital camera, various kinds of distortions such as noise, geometrical distortions, and lens distortions are applied. slightly and simultaneously. In this paper, we consider several steps to extract fingerprints from the distorted image in print-and capture scenario. To embed ID into an image as a fingerprint, multi-bits embedding is applied. We embed 64 bits information as a fingerprint into spatial domain of color images. In order to restore a captured image from distortions a noise reduction filter is performed and a rectilinear tiling pattern is used as a template. To make the template, a multi-bits fingerprint is embedded repeatedly like a tiling pattern. We show that the extracting is successful from the image captured by a digital camera through the experiment.

• Journal of applied mathematics & informatics
• /
• v.3 no.2
• /
• pp.157-168
• /
• 1996

This paper describes an efficient coding method for Ko-rean characters (alphabet) using a three-state transition graph. Par-allel hangul Dynamic Coding Method (PHDCM) compresses about 3.5 bits per Korean character compared with other coding techinques. When we ran the method on a MasPar machine it achieved a 49.314-fold speedup with 64 processors having 10 million orean characters