• ETRI Journal
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• v.27 no.5
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• pp.484-490
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• 2005

We fabricated 40 Gb/s front-end optical receivers using spot-size converter integrated waveguide photodiodes (SSC-WGPDs). The fabricated SSC-WGPD chips showed a high responsivity of approximately 0.8 A/W and a 3 dB bandwidth of approximately 40 GHz. A selective wet-etching method was first adopted to realize the required width and depth of a tapered waveguide. Two types of electrical pre-amplifier chips were used in our study. One has higher gain and the other has a broader bandwidth. The 3 dB bandwidths of the higher gain and broader bandwidth modules were about 32 and 42 GHz, respectively. Clear 40 Gb/s non-return-to-zero (NRZ) eye diagrams showed good system applicability of these modules.

• Journal of the Optical Society of Korea
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• v.12 no.4
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• pp.244-248
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• 2008

We have evaluated the performance of strain-chirped fiber Bragg grating (FBG) based tunable dispersion compensator in a 40 Gb/s transmission link. In our proposed compensator, the value of dispersion could be changed from -353 ps/nm to -962 ps/nm by adjusting the rotation angle of the metal beam on which the FBG was mounted. In order to evaluate the effect of ripples in reflectivity and variations in passband of the FBG based dispersion compensator, transmission performance has been measured with our tunable dispersion compensator. Error-free transmission of a 40 Gb/s non-return-to-zero (NRZ) signal over conventional single-mode fiber (SMF) was achieved.

• Electronics and Telecommunications Trends
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• v.24 no.1
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• pp.43-49
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• 2009

최근 높은 대역폭을 요구하는 다양한 IP 멀티미디어 애플리케이션이 증가하면서 10G 이더넷 서비스가 폭넓게 이용되고 있으나, 이도 가까운 시기에 트래픽의 한계에 이를 것에 대비하여 보다 큰 대역폭을 제공할 수 있는 40G급 이더넷 기술에 관한 표준화 드래프트 1.0 규격이 이더넷은 IEEE 802.3ba에 의해 2008년 9월 완성되었으며 2009년 완료를 목표로 하고 있다. 본 고에서는 표준화 기술이 어떻게 채택되고 있는지를 알아보고, 40G 표준화 이더넷 백플레인 기술 및 등화기 구현방안에 대하여 기술한다.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.155-158
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• 2001

A 640Gb/s high-speed ATM switching system that is based on the technologies of advanced MCM, 0.25um CMOS and optical WDM interconnection is fabricated for future N-ISDN services. A 40 layer, 160mm$\times$114mm ceramic MCM realizes the basic ATM switch module with 80Gbps throughput. The basic unit ATM switch module with 80Gb/s throughput. The basic unit ATM switch MCM consists of in 8 chip advanced 0.25um CMOS VLSI and 32 chip I/O Bipolar VLSIs. The MCM employs an 40 layer, very thin layer ceramic MCM and a uniquely structured closed loop type liquid colling system is adopted to cope with the MCM's high-power dissipation of 230w. The MCM is Mounted on a 32cm$\times$50cm mother board. A three stage ATM switch is realized by optical WDM interconnection between the high-performance MCM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.7
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• pp.1347-1353
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• 2015

We implemented a 10 Gb/s 4-channel vertical cavity surface emission lasers (VCSEL) driver array in a $0.13{\mu}m$ CMOS process technology. To enhance high current resolution, power dissipation, and chip space area, digital APC/AMC with time division sensing technology is primarily adopted. The measured -3 dB frequency bandwidth is 9.2 GHz; the small signal gain is 10.5 dB; the current resolution is 0.01 mA/step, suitable for the wavelength operation up to 10 Gb/s over a wide temperature range. The proposed APC and AMC demonstrate 5 to 20 mA of bias current control and 5 to 20 mA of modulation current control. The whole chip consumes 371 mW of low power under the maximum modulation and bias currents. The active chip size is $3.71{\times}1.3mm^2$.

• Korean Journal of Optics and Photonics
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• v.14 no.5
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• pp.509-514
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• 2003

Mach-Zehnder interferometric wavelength converters with monolithically integrated semiconductor optical amplifiers (SOA's) have been fabricated and characteristics of wavelength conversion at 10 Gb/s have been investigated for wavelength span of 40 nm. The devices have been achieved by using a butt-joint combination of buried ridge structure type SOA's and passive waveguides. In the integration, a new method has been applied that removes p+InP cladding layer leading to high propagation loss and forms simultaneously the current blocking and the cladding layer using undoped InP. The module packaging has been achieved by using a titled fiber array for effective coupling into the tilted waveguide in the wavelength converter. Using the module, wavelength conversion with power penalty lower than 1 ㏈ at 10 Gb/s has been demonstrated for wavelength span of 40 nm. In addition, it is show that the module can provide 2R (re-amplification, re-shaping) operation by demonstrating the conversion with the negative penalty.

• Electronics and Telecommunications Trends
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• v.30 no.1
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• pp.65-76
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• 2015

스마트폰의 보급에 따른 대용량 멀디미디어 서비스의 폭발적인 수요 증가에 따라데이터센터의 100Gb/s 광트랜시버에 대한 수요는 2017년을 기점으로 10Gb/s를 추월하여 2018년 데이터콤 전체 시장의 50% 이상을 차지할 전망이다. 한편, 데이터센터의 소비전력 및 시스템 집적도 증가를 위해 광트랜시버의 Form-factor는 CFP(40G/100G Form-factor Pluggable)에서 QSFP28($4{\times}28G$ Quad Small Form-factor Pluggable)로 약 1/14배 소형화될 전망이며, 이에 따른 광트랜시버 구성 부품의 집적도는 높아지고 소비전력은 현재 대비 1/9로 낮아져야 한다. 본고에서는 소형화 및 저전력화를 위한 광트랜시버의 표준화 및 기술동향과 국내외 시장동향에 대해 기술한다.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.375-378
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• 2001

A 640Gb/s very advanced ATM switching system using 0.25um CMOS VLSI, 40 layer ceramic MCM and 10Gb/s, 8 wavelength 8$\times$8 optical WDM interconnection has been fabricated. To break though the interconnection bottleneck, optical WDM interconnection is used. It has 20Gb/s 8 wavelength 8$\times$8 interconnection capability. It realizes 640Gb/s interconnections within a very small size. Preliminary tests show that 800b1s ATM switch MCM and optical WDM interconnection technologies can be applied to future high speed broadband networks

• Electronics and Telecommunications Trends
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• v.24 no.1
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• pp.12-23
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• 2009

광트랜시버는 광전송 시스템, 대용량 라우터 및 스위치 등의 광통신 장치에서 전기 신호를 광신호로 바꿔 광섬유를 매체로 송신하며 송신된 광신호를 수신하여 다시 전기 신호로 바꿔주는 광송신과 광수신 기능을 담당하는 모듈을 말한다. 광 송수신 모듈은 초창기 155M, 622M, 2.5 Gb/s SDH/SONET 시스템에 사용되었을 때에는 광송신기와 광수신기가 분리되어 있는 구조였으나, 2000년 이후에 들어서서 광송신기와 수신기가 하나의 패키지 안에 구현된 지금의 광트랜시버 모듈이 등장하였다. 또한, 광트랜시버 모듈 업체를 중심으로 시스템 업체, 부품업체들이 모여 산업체 표준(MSA)을 정하면서 개발 비용과 시간 단축의 효과를 거두는 동시에, 기술면에서도 비약적인 발전을 거듭하고 있다. 이러한 광트랜시버의 발전 방향은 고속화, 소형화, 고성능화, 저가격화로 요약할 수 있다. 본 고에서는 10 Gb/s, 40 Gb/s, 100 Gb/s 광트랜시버를 중심으로 기술동향을 설명하고, 광트랜시버를 개발하는 데 필요한 요소기술에 관하여 살펴본다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37B no.9
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• pp.814-821
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• 2012

We propose a network processor called an OmniFlow processor capable of wire-speed flow management by a hardware-based flow admission control(FAC) in this paper. Because the OmniFlow processor can set up and release a wire-speed connection for flows, the update period of flows can be set to a short time, and only active flows can be effectively managed by terminating a flow that does not have a packet transmitted within this period. Therefore, the FAC can be used to provide a reliable transmission of UDP as well as TCP applications. This processor is fabricated in 65nm CMOS technology, and total gate count is 25 million. It has 40 Gb/s throughput performance in using the 32 RISC cores when maximum operating frequency is 555MHz.