• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.8 no.6
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• pp.939-946
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• 2018

In this work, we present simple schematics for a three-terminal graphene-based nanoelectromechanical switch with the vertical electrode, and we investigated their operational dynamics via classical molecular dynamics simulations. The main structure is both the vertical pin electrode grown in the center of the square hole and the graphene covering on the hole. The potential difference between the bottom gate of the hole and the graphene of the top cover is applied to deflect the graphene. By performing classical molecular dynamic simulations, we investigate the nanoelectromechanical properties of a three-terminal graphene-based nanoelectromechanical switch with vertical pin electrode, which can be switched by the externally applied force. The elastostatic energy of the deflected graphene is also very important factor to analyze the three-terminal graphene-based nanoelectromechanical switch. This simulation work explicitly demonstrated that such devices are applicable to nanoscale sensors and quantum computing, as well as ultra-fast-response switching devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.16-24
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• 2009

Independent-gate-mode double-gate(IGM-DG) MOSFET overcomes the limitation of 3-terminal device structure, and enables to operate with different voltages for front-gate and back-gate. Therefore, circuit designs becomes not only simple, but also area-efficient due to the controllability of the 4th terminal provided by IGM-DG MOSFETs. In this paper, an RF receiver utilizing IGM-DG MOSFETs is presented and also, the circuit performance is verified by the HSPICE simulations. Besides, the circuit analysis and optimization are performed for various IGM-DG characteristics.

• Journal of the Korean Institute of Telematics and Electronics
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• v.17 no.6
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• pp.65-71
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• 1980

The Sn O2-Si Heterojunction sola cells are Prepared by vacuum deposition of SnO2 on N- and P-type Si - wafers arts the effects of annealing on the Solar cell characteiistics are presented. The existence of optimumannealins temperature for maximum open-circuit voltage and short - circuit current of the solar cell is observed. The optimum tomperature, when low resistivity (7- 2.3 [$\Omega$.cm]) P-and N-type Si -wafers are used, is 500 [$^{\circ}C$] End 400 [$^{\circ}C$] when high resistivity[41-58 [$\Omega$.cm]) P-type Si-wafers are used.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.180-184
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• 2013

In this paper, a low power antenna switch controller IC is designed using a silicon-on-insulator (SOI) CMOS technology. To improve power handling capability and harmonic distortion performance of the antenna switch, the proposed antenna switch controller provides 3-state logic level such as +VDD, GND, and -VDD for the gate and body of switch of FETs according to decoder signal. By employing input-coupled current ring oscillator and hardware efficient level shifter, the proposed controller greatly reduces power consumption and hardware complexity. It consumes 135 ${\mu}A$ at a 2.5 V supply voltage in active mode, and occupies $1.3mm{\times}0.5mm$ in area. In addition, it shows fast start-up time of 10 ${\mu}s$.

• Journal of IKEEE
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• v.27 no.1
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• pp.45-52
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• 2023

Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.8-18
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• 2000

We presented a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. As the frequency of RF system devices increases, the effect of its electrical parasitics in the wireless communication system requires new structure of RF circuit modules because of its needs to be considered of electrical performance for minimization and module mobility. RF circuit modules with BGA packages can provide some advantages such as minimization, shorter circuit routing, and noise improvement by reducing electrical noise affected to analog and digital mixed circuits, etc. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and measured electrical parameters with a TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3${\times}$3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, and self inductance 146pH, whose values were reduced to 34% and 47% of the value of QFP package structure. S11 parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55GHz and the loss of 0.26dB. Routing length of the substrate was reduced to 39.8mm. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.