Design of RF Receiver using Independent-Gate-Mode Double-Gate MOSFET

Independent-Gate-Mode Double-Gate MOSFET을 이용한 RF Receiver 설계

  • Jeong, Na-Rae (Department of Electronic Engineering, Ewha Womans University) ;
  • Kim, Yu-Jin (Department of Electronic Engineering, Ewha Womans University) ;
  • Yun, Ji-Sook (Department of Electronic Engineering, Ewha Womans University) ;
  • Park, Sung-Min (Department of Electronic Engineering, Ewha Womans University) ;
  • Shin, Hyung-Soon (Department of Electronic Engineering, Ewha Womans University)
  • 정나래 (이화여자대학교 전자공학과) ;
  • 김유진 (이화여자대학교 전자공학과) ;
  • 윤지숙 (이화여자대학교 전자공학과) ;
  • 박성민 (이화여자대학교 전자공학과) ;
  • 신형순 (이화여자대학교 전자공학과)
  • Received : 2009.08.10
  • Published : 2009.10.25

Abstract

Independent-gate-mode double-gate(IGM-DG) MOSFET overcomes the limitation of 3-terminal device structure, and enables to operate with different voltages for front-gate and back-gate. Therefore, circuit designs becomes not only simple, but also area-efficient due to the controllability of the 4th terminal provided by IGM-DG MOSFETs. In this paper, an RF receiver utilizing IGM-DG MOSFETs is presented and also, the circuit performance is verified by the HSPICE simulations. Besides, the circuit analysis and optimization are performed for various IGM-DG characteristics.

Independent-Gate-Mode Double-Gate(IGM-DG) MOSFET는 기존의 DG-MOSFET의 3-terminal 소자구조가 갖고 있는 한계에서 벗어나 front-gate와 back-gate를 서로 다른 전압으로 구동하는 것이 가능하다. IGM-DG를 이용함으로써 4번째 단자의 자유도에 의해 회로설계가 간단해 질 뿐 아니라, 집적도를 향상시킬 수 있는 장점을 가진다. 본 논문에서는 IGM-DG MOSFET를 사용하여 RF 수신단을 설계하였고, HSPICE 시뮬레이션을 통해 회로성능을 검증하고 소자의 특성변화에 따른 최적의 회로설계 방향을 제시하였다.

Keywords

References

  1. B. Majkusiak, 'Semiconductor Thickness Effets in the Double-Gate SOI MOSFET', IEEE Trans. Electron devices, vol. 45, no. 5, p. 1127, 1998 https://doi.org/10.1109/16.669563
  2. H. S. Wong et al., 'Design and Performance Considerations for Sub-0.1um Double-Gate SOI MOSFET's', in IEDM Tech. Deg, p. 747, 1994
  3. Y. Taur 'An Analytical Solution to a Double-Gate MOSFET with Undoped Body', IEEE Electron Device Lett, vol. 21, no. 5, p. 245, 2000 https://doi.org/10.1109/55.841310
  4. S. Kaya, H. F. A. Hamed, and J.A. Starzyk, 'Low-Power Tunable Analog Circuit Blocks Based on Nanoscale Double-Gate MOSFETs', IEEE Trans. Circuits and Systems, vol. 54, no.7, 2007
  5. 박정민 et al., '서브샘플링 직접변환 수신기용 광대역 증폭기 및 High-Q 대역통과 필터', 대한전자공학회지, 제 45권 SD편, 제 11호, p. 89, 2008년
  6. T. H. Lee, 'The Deign of CMOS Radio-Frequency Integrated Circuits', Cambridge, 1998
  7. H. Q. Liu, W. L. Goh and L. Siek, 'Design and frequency/phase-noise analysis of 10-GHz CMOS ring oscillator with coarse and fine frequency tuning', Analog Integrated Circuits and Signal Processing, vol. 48, p.85, 2006 https://doi.org/10.1007/s10470-006-7226-6
  8. H. Q. Liu, W. L. Goh and L. Siek, 'A 0.18-um 10-GHz CMOS Ring Oscillator for Optical Transceivers', IEEE Proc. of ISCAS, vol. 2, p.1525, 2005
  9. J. A. M. Jarvinen et al. '2.4-GHz Receiver for Sensor Applications', IEEE J. of Solid-state circuits, vol. 40, p.1426, 2005 https://doi.org/10.1109/JSSC.2005.847273
  10. D. Yee et al., 'A 2-GHz low-power single-chip CMOS receiver for WCDMA applications', IEEE Solid-state circuits conf., p. 57, 2000