• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제18권8호
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• pp.873-879
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• 2007

We have implemented a highly efficient 2.14-GHz class-F amplifier using Freescale 4-W peak envelope power(PEP) RF Si lateral diffusion metal-oxide-semiconductor field effect transistor(LDMOSFET). Because the control of the all harmonic contents is very difficult, we have managed only the $2^{nd}\;and\;3^{rd}$ harmonics to obtain the high efficiency with simple harmonic control circuit. In order to design the harmonic control circuit accurately, we extracted the bonding wire inductance and drain-source capacitance which are dominant parasitic and package effect components of the device. And then, we have fabricated the class-F amplifier. The measured drain and power-added efficiency are 65.1 % and 60,3 %, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제22권2호
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• pp.199-207
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• 2011

A Ku-band low noise amplifier has been designed and fabricated by using 0.25 um SiGe BiCMOS process. The developed Ku-band LNA RFIC which has been designed with hetero-junction bipolar transistor(HBT) in the BiCMOS process have noise figure about 2.0 dB and linear gain over 19 dB in the frequency range from 9 GHz to 14 GHz. Optimization technique for p-tap value and electro-magnetic(EM) simulation technique had been used to overcome the inaccuracy in the PDK provided from the foundry service company and to supply the insufficient inductor library. The finally fabricated low noise amplifier of two fabrication runs has been implemented with the size of $0.65\;mm{\times}0.55\;mm$. The pure amplifier circuit layout with the reduced size of $0.4\;mm{\times}0.4\;mm$ without the input and output RF pads and DC bais pads has been incorporated as low noise amplication stages in the multi-function RFIC for the active phased array antenna of Ku-band satellite VSAT.

• Journal of electromagnetic engineering and science
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• 제17권2호
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• pp.98-104
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• 2017

This work describes the development and comparison of two phase-locked loops (PLLs) based on a 65-nm CMOS technology. The PLLs incorporate two different topologies for the output voltage-controlled oscillator (VCO): LC cross-coupled and differential Colpitts. The measured locking ranges of the LC cross-coupled VCO-based phase-locked loop (PLL1) and the Colpitts VCO-based phase-locked loop (PLL2) are 119.84-122.61 GHz and 126.53-129.29 GHz, respectively. Th e output powers of PLL1 and PLL2 are -8.6 dBm and -10.5 dBm with DC power consumptions of 127.3 mW and 142.8 mW, respectively. Th e measured phase noise of PLL1 is -59.2 at 10 kHz offset and -104.5 at 10 MHz offset, and the phase noise of PLL2 is -60.9 dBc/Hz at 10 kHz offset and -104.4 dBc/Hz at 10 MHz offset. The chip sizes are $1,080{\mu}m{\times}760{\mu}m$ (PLL1) and $1,100{\mu}m{\times}800{\mu}m$ (PLL2), including the probing pads.

• Journal of Advanced Navigation Technology
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• 제19권1호
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• pp.60-65
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• 2015

In the present study, compact $0^{th}$ order resonant antenna for 2.4 GHz ISM frequency band is newly proposed. In case of wireless communication systems such as wi-fi, bluetooth and Zigbee, antennas with omni-directional radiation pattern are necessary because of the demands for uniformly received electric field strength without variation for direction. It is well-known that $0^{th}$ order resonant antennas are not only advantageous for miniaturization but also have advantage of maintaining omni-directional radiation pattern. The proposed antenna is composed of two-element array in which the size of unit element should be smaller than ${\lambda}/4$ correspondent to the resonant length of typical monopole antennas The proposed antenna which is placed at middle and upper side of PCB with $50{\times}50mm^2$ size is designed and fabricated within limited space of $8{\times}5mm^2$. The measured impedance bandwidth ($S_{11}{\leq}-10dB$) is about 100 MHz (2.4~2.5 GHz) which corresponds to quite wide bandwidth in comparison with the antenna size, and also the measured peak gain over the passband is more than 3 dBi which is thought to be slightly wider than the other $0^{th}$ order resonant antenna.

• Journal of the Institute of Electronics and Information Engineers
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• 제54권1호
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• pp.11-17
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• 2017

In this paper, an 8-direction switched beamforming antenna system at 28GHz frequency band is described for 5th generation wireless communication. This system is composed of an $8{\times}8$ Butler matrix and an 8-element patch array antenna. The antenna system switches beams in 8-direction in the wide range of ${\pm}40^{\circ}$. The antenna spacing is $0.65{\lambda}$ to achieve ${\pm}40^{\circ}$ steering range. Designed results show that the 8-direction beams are placed at ${\pm}6^{\circ}$, ${\pm}17^{\circ}$, ${\pm}28^{\circ}$, ${\pm}40^{\circ}$ offset from the center. Parasitic radiation effect from the large dimension Butler matrix need to be suppressed by employing a stripline structure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제24권2호
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• pp.214-217
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• 2013

In this paper, a waveguide-type resonator with a slot is proposed to measure permittivity of thin film from resonant frequency shifting by an attached MUT(Material Under Test). The MUT on the slot shifts resonant frequency by perturbation of electromagnetic field. Amount of shifting resonance frequency is dependent on the permittivity of MUT, and that relation is obtained from numerical simulation. The measured relative permittivity of a thin film with thickness of $65{\mu}m$ is 3.3492 with standard error of ${\pm}0.0605$ in the frequency range of 2 GHz to 3 GHz. Also the proposed method is compared with other measuring methods such as dielectric resonator and waveguide probe systems.

• The Bulletin of The Korean Astronomical Society
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• 제37권1호
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• pp.65.2-65.2
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• 2012

세계전파통신회의 (WRC; World Radiocommunication Conference)회의는 국제전기통신연합 (ITU)에서 규정하는 국제 전파법 제개정을 위해, 3-4년 간격으로 개최되는 전파통신 관련 최고회의라고 할 수 있다. WRC-12회의는 2012년 1월 23일 - 2월 17일에 걸쳐 스위스 제네바에서 WRC-07회의가 개최되었다. 본 회의에서는 전세계의 국가별 전파사용을 둘러싼 정치적, 경제적 이권 다툼이 치열하게 진행되었으며, 25개의 WRC 의제들에 대해 국제전기통신 연합 산하의 연구반 (ITU-R Study Group)의 연구결과를 토대로 관련 국제전파규약들을 최종적으로 개정하였다. 따라서 국내 전파천문대의 입장에서는 상기 회의의 의제 가운데 국내전파천문대의 원활한 운용과 사용주파수 대역의 보호를 위해 필요한 우리나라의 기고서를 발표하였다. 그 결과 국내의 전파천문대 운영과 관련된 22 GHz 대역이라든지 ALMA용의 275GHz 이상 대역, 달탐사용의 37GHz 대역 등에 대한 신규주파수 또는 보호조건 강화 등이 완료되었다. 본 발표에서는 WRC-12회의에서 결정된 최종결과 및 이들이 국내전파천문대의 향후 운영에 미치는 영향을 보고하고자 한다. 또한 차기 WRC-15회의를 위해 새로 제정된 의제들 가운데 전파천문을 비롯한 과학업무 관련 의제 소개 및 대응책 검토를 하고자 한다.

• The Journal of the Korea institute of electronic communication sciences
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• 제18권6호
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• pp.1015-1022
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• 2023

In this paper, we propose DLP(Dual Linear Polarization) antenna with aperture coupled feeding structure for private network. The proposed antenna has general aperture coupled structure and design two port between top and bottom layer to obtain the enhanced isolation. Also, The size of each substrate(top and bottom layer) is 34.0 mm(W)×34.0 mm(L), which is designed on the FR-4 substrate which thickness (h) is 1.0 mm, and the dielectric constant is 4.4. Also, the size of patch antenna is 12.70 mm(W2)×14.60 mm(L3), and it is located on the top layer. The size of feeding line is 24.0 mm(W2)×1.6 mm(L3), and is located at the bottom layer Also, rectangular slot is located on the ground plane between top layer and bottom layer. From the fabrication and measurement results, bandwidths of 300 MHz (4.52 to 4.82 GHz) for feeding port 1, and 170 MHz (4.65 to 4.82 GHz) for feeding port 2 are obtained on the basis of -10 dB return loss and transmission coefficient S21 is got under the -30 dB. Also, cross polarization isolation between each feeding port obtained

• Journal of Sensor Science and Technology
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• 제28권4호
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• pp.240-245
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• 2019

Phase interpolation is widely adopted in frequency synthesizers and clock-and-data recovery systems to produce an intermediate phase from two existing phases. The intermediate phase is typically generated by combining two input phases with different weights. Unfortunately, this results in non-uniform phase steps. Alternatively, the intermediate phase can be generated by successive approximation, where the interpolated phase at each approximation stage is obtained using the same weight for the two intermediate phases. As a proof of concept, this study presents a 2-GHz 8-bit successive approximation digital-to-phase converter that is designed using 65-nm CMOS technology. The converter receives an 8-phase clock signal as input, and the most significant bit (MSB) section selects four phases to create two sinusoidal waveforms using a harmonic rejection filter. The remaining least significant bit (LSB) section applies the successive approximation to generate the required intermediate phase. Monte-Carlo simulations show that the proposed converter exhibits 0.46-LSB integral nonlinearity and 0.31-LSB differential nonlinearity with a power consumption of 3.12 mW from a 1.2-V supply voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제3권2호
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• pp.305-311
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• 1999

In this paper, it is designed a new type single layer patch antenna which is printed on a very thin film and separated from the ground-plane by foam with a low permitivity of 1.06 and a high thickness of around quarter wavelength. It allows the use of three-dimensional transition, from one level to another, so that its bandwidth can be enhanced by wideband impedance matching. The radiation pattern, return loss, and VSWR of the antenna are calculated using "IE3D" simulation package, and compared with the experimental results. Experimental results show that the bandwidth is about 65% of center frequency 6.8 GHz, return loss and VSWR are in a fairly good agreement with the calculations.culations.