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http://dx.doi.org/10.5369/JSST.2019.28.4.240

A 2-GHz 8-bit Successive Approximation Digital-to-Phase Converter  

Shim, Jae Hoon (School of Electronics Engineering, Kyungpook National Unversity)
Publication Information
Journal of Sensor Science and Technology / v.28, no.4, 2019 , pp. 240-245 More about this Journal
Abstract
Phase interpolation is widely adopted in frequency synthesizers and clock-and-data recovery systems to produce an intermediate phase from two existing phases. The intermediate phase is typically generated by combining two input phases with different weights. Unfortunately, this results in non-uniform phase steps. Alternatively, the intermediate phase can be generated by successive approximation, where the interpolated phase at each approximation stage is obtained using the same weight for the two intermediate phases. As a proof of concept, this study presents a 2-GHz 8-bit successive approximation digital-to-phase converter that is designed using 65-nm CMOS technology. The converter receives an 8-phase clock signal as input, and the most significant bit (MSB) section selects four phases to create two sinusoidal waveforms using a harmonic rejection filter. The remaining least significant bit (LSB) section applies the successive approximation to generate the required intermediate phase. Monte-Carlo simulations show that the proposed converter exhibits 0.46-LSB integral nonlinearity and 0.31-LSB differential nonlinearity with a power consumption of 3.12 mW from a 1.2-V supply voltage.
Keywords
Digital-to-phase converter; Phase interpolation; Successive approximation; Frequency synthesizer; Clock and data recovery;
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