• Title/Summary/Keyword: 2-level inverter

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Maximum Efficiency Operation of Three-Level T-type Inverter for Low-Voltage and Low-Power Home Appliances

  • Shin, Seung-Min;Ahn, Jung-Hoon;Lee, Byoung-Kuk
    • Journal of Electrical Engineering and Technology
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    • v.10 no.2
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    • pp.586-594
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    • 2015
  • This paper proposes a maximum efficiency operation strategy for three-level T-type inverter in entire operation areas. The three-level T-type inverter has higher and lower efficiency areas compared with two-level inverter. The proposed strategy aims to operate in the maximum efficiency point for the low-voltage and low-power home appliances. The three-level T-type inverter is analyzed in detail, and the two operation mode selection strategy is developed. The proposed algorithm is verified by theoretical analysis and experimental results.

Multi-level PWM Inverter Considering the number of Output Voltage level and Current rating (출력전압 레벨 수와 전류정격을 고려한 PWM 다중레벨 인버터)

  • Park, N.S.;Seo, J.J.;Park, S.J.;Kim, K.H.;Cho, S.E.;Kim, C.U.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.659-662
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    • 2005
  • In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

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Optimum Hybrid SVPWM Technique for Three-level Inverter on the Basis of Minimum RMS Flux Ripple

  • Nair, Meenu D.;Biswas, Jayanta;Vivek, G.;Barai, Mukti
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.413-430
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    • 2019
  • This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

DSP-Based Simplified Space-Vector PWM for a Three-Level VSI with Experimental Validation

  • Ramirez, Jose Dario Betanzos;Rivas, Jaime Jose Rodriguez;Peralta-Sanchez, Edgar
    • Journal of Power Electronics
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    • v.12 no.2
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    • pp.285-293
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    • 2012
  • Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.

The Analysis of Conduction and Switching Losses in Multi-Level Inverter System (멀티레벨 인버터 시스템의 전도손실과 스위칭손실 해석)

  • 金 兌 珍;姜 岱 旭;;玄 東 石
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.2
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    • pp.111-120
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    • 2002
  • The multi-level inverter system is very promising in ac drives, when both reduced harmonic contents and high power are required. In case of multi-level inverter system, the loss of switch devices cannot be analyzed by conventional methods. The reason is that the loss of each the switch device is different from one another unlike 2-level. In this paper, a simple and accurate method of computing conduction and switching loss is proposed for multi-level inverter system. The validity of the proposed method is proven for 3-level and 4-revel diode clamped inverter system.

A Novel Multi-Level Inverter Configuration for High Voltage Conversion System

  • Suh, Bum-Seok;Lee, Yo-Han;Hyun, Dong-Seok
    • Journal of Electrical Engineering and information Science
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    • v.1 no.2
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    • pp.109-118
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    • 1996
  • This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

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A Study on the 3 phase 5 level PWM inverter reducing harmonics (고조파 저감형 3상 5레벨 PWM 인버터에 관한 연구)

  • 송언빈
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 1995.10a
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    • pp.80-84
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    • 1995
  • ABSTRACT - This paper presents a software based 3 phase 5 level pulse-width modulation(PWM) inverter to reduce total harmonic distortion. The proposed modulation technique can reduce total harmonic distortion and significantly improve the performance of the inverter. In the modulation mode where the frequency ratio is 36 and modulation index is 1.2∼2.0, harmonic components have been mostly eliminated and the magnitude of fundamental component have been maximized by the 3 phase 5 level PWM inverter.

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Torque Ripple Minimization for Induction Motor Driven by a Photovoltaic Inverter

  • Atia, Yousry
    • Journal of Power Electronics
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    • v.9 no.5
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    • pp.679-690
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    • 2009
  • The paper presents a new photovoltaic inverter for stand-alone induction motor application. The proposed system is composed of two stages. First stage is for the photovoltaic dc power feeding and second stage is dedicated to the motor-inverter subsystem and control technique. A direct torque control (DTC) with a novel switching strategy for motor torque ripple minimization is introduced. The novel DTC strategy is based on selecting a suitable voltage vector group for motor torque ripple minimization. A three-level voltage source inverter (VSI) is used instead of a two level inverter because the first has more available vectors and lower ripples in the output current and flux than the second, thus it has lower torque ripples. The photovoltaic array and battery bank are sized and the configuration is indicated based on sun-hour methodology. Simulation results show a comparison between three systems; two level VSI with conventional DTC strategy, three level VSI with conventional DTC, and the proposed system that has a novel DTC switching strategy applied to three level VSI. The results show that the proposed system has lower ripples in the current, flux and torque of the motor.

A novel hybrid multilevel inverter using DC-Link voltage combination (DC 링크 전압조합을 이용한 새로운 Hybrid형 멀티레벨 인버터)

  • 주성용;강필순;박성준;김철우
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.2
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    • pp.68-74
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    • 2004
  • This paper presents a novel hybrid multilevel inverter using DC-Link voltage combination in order to improve the waveshape of output voltage and reduce harmonics. The proposed multilevel inverter can generate an 11-level output voltage. It employs three H-bridge cell, which consists of single phase full-bridge inverter module. Among them, two modules are used for level generation, and one module performs PWM switching. Nine levels are synthesised by the level inverter, and two levels are added to output by the PWM inverter. As a result, it generates an 11-level. The operational principles are explained in depth, and the validity of the proposed system is verified through the PSpice simulation and experimental results based on a prototype.

Modeling and Experimental Validation of 5-level Hybrid H-bridge Multilevel Inverter Fed DTC-IM Drive

  • Islam, Md. Didarul;Reza, C.M.F.S.;Mekhilef, Saad
    • Journal of Electrical Engineering and Technology
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    • v.10 no.2
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    • pp.574-585
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    • 2015
  • This paper aims to improve the performance of conventional direct torque control (DTC) drives proposed by Takahashi by extending the idea for 5-level inverter. Hybrid cascaded H-bridge topology is used to achieve inverter voltage vector composed of 5-level of voltage. Although DTC is very popular for its simplicity but it suffers from some disadvantages like- high torque ripple and uncontrollable switching frequency. To compensate these shortcomings conventional DTC strategy is modified for five levels voltage source inverter (VSI). Multilevel hysteresis controller for both flux and torque is used. Optimal voltage vector selection from precise lookup table utilizing 12 sector, 9 torque level and 4 flux level is proposed to improve DTC performance. These voltage references are produced utilizing a hybrid cascaded H-bridge multilevel inverter, where inverter each phase can be realized using multiple dc source. Fuel cells, car batteries or ultra-capacitor are normally the choice of required dc source. Simulation results shows that the DTC drive performance is considerably improved in terms of lower torque and flux ripple and less THD. These have been experimentally evaluated and compared with the basic DTC developed by Takahashi.