• ETRI Journal
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• v.36 no.1
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• pp.141-150
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• 2014

A fully integrated CMOS security-enhanced passive (SEP) tag that compensates the security weakness of ISO/IEC 18000-6C is presented in this paper. For this purpose, we propose a security-enhanced protocol that provides mutual authentication between tag and reader. We show that the proposed protocol meets the security demands of the ongoing international standard for RFID secure systems, ISO/IEC 29167-6. This paper fabricates the SEP tag with a 0.18-${\mu}m$ CMOS technology and suggests the optimal operating frequency of the CMOS SEP tag to comply with ISO/IEC 18000-6C. Furthermore, we measure the SEP tag under a wireless environment. The measured results show that communications between the SEP tag and reader are successfully executed in both conventional passive and SEP modes, which follow ISO/IEC 18000-6C and the proposed security enhanced protocol, respectively. In particular, this paper shows that the SEP tag satisfies the timing link requirement specified in ISO/IEC 18000-6C.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5C
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• pp.540-547
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• 2006

This paper proposes a novel anti-collision method for the ISO/IEC 18000-6 type B protocol which is the standard protocol of the 900 MHz RFID system. We improve the anti-collision performance by reducing the transmission number of commands and the length of bits required for multi-tag identification in the ISO/IEC 18000-6 type B protocol. Simulation results show that the proposed method improves the multi-tag identification time by 21.7% over the conventional method, irrespective of number of tags.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10A
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• pp.1015-1022
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• 2007

In this paper, dual-band digital codec for UHF(Ultra High Frequency) and MW(Micro Wave) is proposed for an RFID reader system. Most RFID systems have been supported only one protocol. But, There are many protocols of each bandwidth. Especially, UHF bandwidth which is widely used on the globe consists of A,B,C type, and more standards will be established. Recently, Since an interest about mobile RFID system is increasing, the RFID system with more than one protocol will be need. Therefore, this paper suggests a dual-band digital codec with UHF and MW bands for an RFID reader system. Standards used in this system are 18000-6C and 18000-4 standards. The digital codec is synthesize by the Quartus II compiler. Target device is EPC20Q240C8 which is family of CycloneII. Main Clock is 19.2MHz and elements of FPGA which is used for the system is 18,752.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.347-347
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• 2006

• Journal of Digital Contents Society
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• v.7 no.3
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• pp.147-151
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• 2006

In recent years, the Internation Standard ISO/IEC 18000-6 is announced and a new scheme of Type C is added to conventional standard. Among the RFID systems the ISO/IEC 18000-6 standard is the most interesting to companies due to its potential market growth. The operating frequency is between 860-960 MHz, and three kinds of RFID system are included in the standard, i.e. type A, B and C. In this paper, we implemented the data frame of type C with baseband coding using VHDL. The data frame is encoded based on Miller code and FM0. We showed the implementation results with waveforms. The data frame was proved that it is properly implemented by the experiment of transmission and receiving operation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.1A
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• pp.83-90
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• 2007

In this paper, we propose an implementation and an algorithm of 'Jitter and Glitch Removing Circuit' for UHF RFID reader system based on ISO/IEC 18000-6C standard. We analyze the response of TI(Texas Instrument) Gen2 tag with a reader using the proposed algorithm. In ISO/IEC 18000-6C standard, a bit rate accuracy(tolerance) is up to +/-22% during tag-to-interrogator communication and +/-1% during interrogator-to-tag communication. In order to solve tolerance problems, we implement the Jitter and Glitch Removing Circuit using the concept of tolerance and tolerance-accumulation instead of PLL(DPLL, ADPLL). The main clock is 19.2MHz and the LF(Link Frequency) is determined as 40kHz to meet the local radio regulation in korea. As a result of simulations, the error-rate is zero within 15% tolerance of tag responses. And in the case of using the adaptive LF generation circuit, the error-rate varies from 0.000589 to zero between 15% and 22% tolerance of tag responses. In conclusion, the error-rate is zero between 0%-22% tolerance of tag response specified in ISO/IEC 18000-6C standard.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.707-713
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• 2007

This paper implements a RFID multi-band multi-protocol reader platform, possible to select one of the UHF bands used in particular for distribution system in RFID, that is, from 860MHz to 960MHz, through programmable configuration. It also enables implemented platform in this paper to recognize many kinds of TAG protocol, such as EPC Class 1 GEN 1, Class 1 Gen2, ISO 18000-6A, B and C.

• Information and Communications Magazine
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• v.25 no.10
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• pp.7-17
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• 2008

RFID 시스템은 유통물류 분야를 비롯해 다양한 분야에서 활용되고 있지만, RFID 시스템에서의 태그 및 리더 충돌로 인해 태그의 인식효율 및 인식속도의 감소가 RFID시스템의 확산에 걸림돌이 되고 있다. 본고에서는 RFID 시스템의 효율을 높이기 위한 태그 및 리더 충돌방지 알고리즘들을 소개한다. 특히, ISO 18000-6 Type C 수동형 RFID 시스템에서의 태그 및 리더 충돌방지 알고리즘에 대하여 집중적으로 알아본다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.1C
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• pp.59-66
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• 2007

This paper proposes a windowing method to reduce noise effect and bit synchronization error caused by tolerance of a tag-response signal for ISO/IEC 18000-6 type-B readers. A tag response signal has very weak power because of a back-scattering modulation scheme and thus may be sensitive to noise. In addition, bit tolerance admitted in a tag response signal requires robust timing synchronization because it affects readers' detection performance. To reduce the two undesirable effects in a tag signal, we acquire bit transition position by using variable windows from over-sampled data, and average whole data in one bit duration. With a hardware system adopting the proposed method, we tested and verified its performance.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.05a
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• pp.927-930
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• 2007

As RFID systems are applied to various fields and applications such as supply chain management, asset management, location based applications etc. the requirements becomes diverse. For example, Much higher performance, TCP/IP protocol stack are required in some applications. However, low end processors based systems such as 8051 processor can not meet such requirements due to their low processing capacity and limited size of memory. In this paper a UHF band RFID system which meets the ISO 18000-6 TYPE C specification with ARM920T-based processor is implemented and tested.