• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.8
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• pp.57-62
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• 1993

In this paper, both feasible power gain and power added efficiency at the operating center frequency of 12 GHz are stressed to design a power FET with double-heterjunction structure. The variable parameters or the design are the unit gate width, the gate length, the doping density of AlGaAs, the AlGaAs thickness, the spacer thickness, the Al mole fraction, and the GaAs well thickness. The results of simulation for the FET with 1.mu.m gate length show that the power gain and the power added efficiency are 10.2 dB and 36.3% at 12GHz, respectively. An extrapolation of the relation between current gain and unilateral gain yields a 17 GHz cutoff frequency and 43GHz maximum frequency of oscillation. The calculation of the current versus voltage characteristics show that the output power of the device is about 0.62W.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.65-72
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• 2011

In this paper, the T-shape stepped impedance resonators are adopted for the design of microstrip bandpass filters for wide harmonics suppression. The proposed filters are operated at the center frequency of 2.44 GHz and 5.20 GHz, respectively. These bandpass filters have been also applied for a high performance diplexer. The insertion losses at the center frequencies of 2.44 and 5.20 GHz are 1.23 and 1.18, respectively. The applicable return losses for both frequency bands and a wide stopband better than 17 dB up to 20 GHz have been obtained.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.225-228
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• 2000

In this paper, the design for a low noise amplifier with the EM simulation is presented. The ATF36077 pHEMT device is applied to design LNA for U-NII frequency band (5 GHz ～ 6 GHz). The matching networks have been designed by the only open ended stub in order to reduce parasitic effects generated from a via structure. Through EM simulator, the simulation result shows that the linear gain (@5.5 GHz) is over 10 dB, input return loss and output return loss (@ 5.5 GHz) are a below 10 dB respectively, and the 3rd order intercept point is about 17 dBm.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.11-17
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• 2017

In this paper, an 8-direction switched beamforming antenna system at 28GHz frequency band is described for 5th generation wireless communication. This system is composed of an $8{\times}8$ Butler matrix and an 8-element patch array antenna. The antenna system switches beams in 8-direction in the wide range of ${\pm}40^{\circ}$. The antenna spacing is $0.65{\lambda}$ to achieve ${\pm}40^{\circ}$ steering range. Designed results show that the 8-direction beams are placed at ${\pm}6^{\circ}$, ${\pm}17^{\circ}$, ${\pm}28^{\circ}$, ${\pm}40^{\circ}$ offset from the center. Parasitic radiation effect from the large dimension Butler matrix need to be suppressed by employing a stripline structure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.7 s.110
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• pp.665-672
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• 2006

In this paper, we propose and fabricate the dual-band microstrip patch antenna with parasitic patch for S-DMB(Satellite-Digital Multimedia Broadcasting) and ITS (Intelligent Transport System) services. The measured - 10 dB bandwidth and the minimum return loss is 300 MHz and - 27 dB for S-DMB, 600 MHz and -17 dB for ITS, respectively. It is noticed that the measured and simulated results are agreed well. The S-DMB antenna has conical beam pattern in the vertical plane and has omni-directional beam pattern in the horizontal plane. The conical beam pattern has the maximum gain about 4.2 dBi when ${\theta}$ is $45^{\circ}$ at the center frequency of 2.6 GHz. The ITS antenna has directional beam pattern in the vertical plane that has maximum gain about 6.4 dBi when ${\theta}$ is $0^{\circ}$ at the center frequency of 5.8 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.732-738
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• 2006

Divide-by-2 and divide-by-4 circuits which can operate up to 10 GHz are designed. A design method used in these circuits is the TSPC(True Single Phase Clocking) topology. The structure of the TSPC dividers is very simple because they need only a single clock and purely consist of smalt sized cmos devices. Through measurements, we find the fact that in proportion to the bias voltage, the free running frequency increases and the operation region also moves toward a higher frequency region. For operating conditions of bias voltage $3.0{\sim}4.0V$, input power 16dBm and dcoffset $1.5{\sim}2.0V$, 5 GHz and 2.5 GHz output signals divided by 2 and 4 are measured. The layout size of the divide-by-2 circuit is about $500{\times}500 um^2$($50{\times}40um^2$ except pad interconnection part).

• Journal of electromagnetic engineering and science
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• v.13 no.3
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• pp.178-185
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• 2013

This paper introduces a high-efficiency, high-gain, broadband quasi-Yagi antenna, and its four-element array for use in 60-GHz wireless communications. The antenna was fed by a microstrip-to-slotline transition consisting of a curved microstripline and a circular slot to allow broadband characteristics. A corrugated ground plane was employed as a reflector to improve the gains in the low-frequency region of the operation bandwidth, and consequently, to reduce variation. The single antenna yielded an impedance bandwidth of 49 to 69 GHz for $|S_{11}|$ <-10dB and a gain of >12.0 dBi while the array exhibited a bandwidth of 52 to 68 GHz and a gain greater than 15.0 dBi. Both proposed designs had small gain variations (${\pm}0.5$ dBi) and high radiation efficiency (>95%) in the 60-GHz bands. The features of the proposed antenna were validated by designing, fabricating, and testing a scaled-up configuration of the single antenna at the 15-GHz band. The measurements resulted in an impedance bandwidth of 13.0 to 17.5 GHz for $|S_{11}|$ <-10dB, a gain of 10.1 to 13.2 dBi, and radiation efficiency in excess of 88% within this bandwidth. Additionally, the 15-GHz antenna yielded quite symmetric radiation profiles in both E- and H-planes, with a high front-to-back ratio.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.227-228
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• 2006

In this paper, we introduce the design and fabrication of 60 GHz low noise amplifier MMIC for IEEE802.15.3c WPAN system. The 60 GHz LNA was designed using ETRI's $0.12{\mu}m$ PHEMT process. The PHEMT shows a peak transconductance ($G_{m,peak}$) of 500 mS/mm, a threshold voltage of -1.2 V, and a drain saturation current of 49 mA for 2 fingers and $100{\mu}m$ total gate width (2f100) at $V_{ds}$=2 V. The RF characteristics of the PHEMT show a cutoff frequency, $f_T$, of 97 GHz, and a maximum oscillation frequency, $f_{max}$, of 166 GHz. The performances of the fabricated 60 GHz LNA MMIC are operating frequency of $60.5{\sim}62.0\;GHz$, small signal gain ($S_{21}$) of $17.4{\sim}18.1\;dB$, gain flatness of 0.7 dB, an input reflection coefficient ($S_{11}$) of $-14{\sim}-3\;dB$, output reflection coefficient ($S_{22}$) of $-11{\sim}-5\;dB$ and noise figure (NF) of 4.5 dB at 60.75 GHz. The chip size of the amplifier MMIC was $3.8{\times}1.4\;mm^2$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2245-2251
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• 2013

In this paper, a design of a compact series-fed dipole pair(SDP) antenna with end-loaded rectangular patches is presented. In order to reduce the lateral size of a conventional SDP antenna, rectangular patches are end-loaded to the two dipole elements of the SDP antenna and a grooved ground plane is used by adding a patch at both ends of the ground plane. The effects of varying the length and width of the rectangular patches on the antenna performance such as input reflection coefficient are investigated. An optimized compact SDP antenna covering a frequency band ranging from 1.7 GHz to 2.7 GHz is designed and fabricated on an FR4 substrate. The total width of the fabricated prototype of the proposed antenna is reduced by approximately 14.3% compared to the conventional SDP antenna. Experimental results show that the antenna presents a 48.7% bandwidth in the range of 1.68-2.76 GHz and a stable gain of 5.6-6.0 dBi with minimal degradation. Moreover, a front-to-back ratio is improved by about 0.7 to 7.4 dB.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.11
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• pp.99-104
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• 2003

We are designed and fabricated the Printed dual monopole antenna with CPW feeder for PCS and IMT2000 band. In this paper il proposed modified dual monopole antenna that is transform conventional monopole antenna to get dual band frequency. The dual monopole antennas had broad bandwidth and omni -directional radiation patterns in construct with conventional monopole antenna. On a monopole operated a stub to other monopole antenna, we could obtain easy an impedance matching. It is increased band width of impedance. The antenna bandwidth is about 150MHz(1.74 ∼1.89〔GHz〕)at 1$^{st}$ resonance frequency and 290MHz(1.95∼2.24GHz) at 2$^{nd}$ resonance frequency on VSWR(equation omitted)1.5 and then we can be got not only 1.75∼1.87〔GHz〕 PCS band but also 1.92∼2.17 〔GHz〕).GHz〕).