• Journal of the Semiconductor & Display Technology
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• v.12 no.4
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• pp.27-32
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• 2013

In this paper, the boost converter was implemented by digital control in many applications of the step-up. The PWM(pulse width modulation) control module of boost converter was digitized at power converter using the FPGA device and VHDL. The boost converter was designed to output a fixed voltage through the PI control algorithm of the PWM control module even if input voltage and output load are variable. The boost converter was digitized can be simplified by reducing the size of the module and the external control components. Thus, the digital power IC has advantageous for weight reduction and miniaturization of electronic products because it can be controlled remotely by setting the desired output voltage and PWM control module. The boost converter using the digital power IC was confirmed through experiments and the good performances were showed from experiment results.

• Journal of Power Electronics
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• v.12 no.1
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• pp.33-39
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• 2012

This paper describes operating and capacitor voltage balancing of the modular multilevel converter. The paper focuses on sizing of the cell capacitor and establishes approximate expressions for the capacitor voltage. Simulations and experiments results obtained from three-level modular converter are used to demonstrate its viability in medium voltage applications. It is shown that the modular converter can operate over the full modulation index linear range independent of load power factor.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.12
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• pp.813-820
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode converter is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode converter and guarantee zero-current-switching(ZCS) of the switch over the wide load range. The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. In addition, control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations and experiments.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.581-585
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• 1998

This paper presents the new current sharing control method of a 12-pulse phase-controlled rectifier(PCR) for a UPS. The control circuit of the 12-Pulse PCR with a parallel operating rectifier system is proposed to balance input currents and to reduce the harmonics of input current. The PCR is used widely in the industrial world, since its cost is much lower than that of the PWM converter and the composition of control circuits is simple. This system is developed and tested for a 3-phase 400KVA UPS system and the experimental results in this application are included.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.2
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• pp.217-224
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• 2009

This paper presents a new AC/DC converter scheme for HVDC system to achieve a high power factor operation. The new AC/DC converter consists of two 12-pulse bridge converters in series: the primary and auxiliary converters. Ignition angles of the main and auxiliary converters are controlled independently to maintain the nominal DC voltage and control auxiliary voltage. The resulted DC voltage obtained by superimposing the above two phase modulated voltages can be controlled very rapidly over a wide range, and a high power factor operation is achieved. Performance improvements in power factor and harmonic distortion are validated by theoretic derivations and experiments with prototype HVDC system. With the proposed converters, investment for reactive power compensation and filter in HVDC system can be saved significantly.

• Proceedings of the KIEE Conference
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• 2005.10a
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• pp.79-81
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• 2005

본 논문은 펄스 삽입 보조 회로를 갖고 있는 12-펄스 브리지 4대를 사용한 36-펄스 back-to-back 전압원 컨버터를 제안한다. 제안된 back-to-back 접압원 컨버터는 교류 연계점에서 유효전력과 무효전력의 독립적인 제어가 가능하다. 펄스 수를 증가하는 원리는 이론적 접근을 사용하여 분석되었다. 제안된 시스템의 동작 타당성은 PSCAD/EMTDC 소프트웨어의 시뮬레이션을 통해 검증되었다. 제안된 back-to-back 전압원 컨버터는 HVDC와 FACTS 장치로 널리 사용될 수 있다.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.556-558
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• 1994

This paper proposes a new converter that can reduce the harmonics like conventional 12-pulse dual thyrister converters with the input transformers. Both the bridges are controlled with the shifted firing angle and connected through current sharing reactors. Using the center tapped reactor, the DC link current is controlled with the different two values in order to make the input current waveform 12 pulses.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1812-1820
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• 2017

This paper analyzes a symmetric active cell balancer for a battery management system. The considered cell balancer uses a forward converter in which the circuit structure is symmetric. This cell-balancing method uses fewer switches and is simpler than the previously proposed active cell-balancing circuits. Active power switches of this cell-balancing circuit operate simultaneously with the same pulse width modulation signals. Therefore, this cell-balancing circuit requires less time to be balanced than a previous bidirectional-forward-converter-based cell balancer. This paper analyzes the operational principles and modes of this cell balancer with computer-based circuit simulation results as well as experimental results in which each unbalanced cell is equalized with this cell balancer. The maximum power transfer efficiency of the investigated cell balancer was 87.5% from the experimental results. In addition to the experimental and analytical results, this paper presents the performance of this symmetric active cell-balancing method.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.12B no.1
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• pp.37-43
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• 2002

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5㎾ prototype boost converter operating at 40KHz.