• Title/Summary/Keyword: 10 기가비트 이더넷

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IEEE 802.3ae 10Gb/s 이더넷의 표준화 동향

  • 이동은;조상엽
    • The Magazine of the IEIE
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    • v.29 no.10
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    • pp.29-38
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    • 2002
  • 2002년 6월, IEEE 802.3ae 10Gb/s 이더넷이 표준으로 승인되었다. 10 Gb/s 이더넷은 MAC 부계층과 물리계층을 통합한 규격으로 전이중 방식 및 광섬유 매체만을 제공한다.기존 이더넷과 동일한 프레임 형식을 사용하고, LAN 물리계층과 WAN 물리계층까지 지원하고 있다. 따라서 LAN, MAN, WAN 영역에서 10Gb/s의 높은 속도를 제공할 수 있으며, 기존의 이더넷과 투명하게 통합할 수 있다. 본 논문에서는 10 기가비트 이더넷의 MAC 부계층과 물리계층 및 최근 기술 동향을 살펴본다.

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Architecture of the Duplicate IPC Network for the 10 Gigabit Ethernet Edge Switch System (10GE 스위치 시스템에서의 이중화 IPC 설계 및 구현)

  • 조규인;김유진;김준식;조경록
    • Proceedings of the IEEK Conference
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    • 2003.07a
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    • pp.390-393
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    • 2003
  • 본 논문은 이스텔시스템즈와 한국전자통신연구원 (ETRI)이 공동개발한 QoS 기반의 10기가비트 이더넷 포트를 가지는 에지 스위치 시스템을 개발 하면서 적용된 분산된 스케일러블 이중화 IPC구조를 제안한다. 제안된 분산된 스케일러블 이중화 IPC구조는 라우팅 관련 로드를 분산하고 데이터 전달 능력을 향상시켜 라우팅의 성능을 개선시키는 것이다. 이 기능이 가능한 것은 라우팅 테이블 생성 및 관리의 분산을 위하여 전이중 방식의 고속이더넷 스위치를 이용한 이중화 IPC구조로 설계되었기 때문이다. 본 논문에서는 분산된 스케일러블 이중화 IPC구조에 대한 내용을 설명하고 그에대한 구현 방법을 설명한다. 제안된 분산된 스케일러블 이중화 IPC는, 차후 공동개발되는 160Gbps급의 10기가비트 이더넷 백본 스위치 시스템에도 적용함으로써 보다 신뢰성 있는 시스템의 설계 효과를 가져올 것으로 생각된다.

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Performance Analysis of Gigabit Network in Campus (캠퍼스 기가비트 네트워크 성능분석)

  • 지홍일;이준희;이재영;조용환
    • The Journal of the Korea Contents Association
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    • v.2 no.3
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    • pp.96-104
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    • 2002
  • This paper has done a network performance test as well as result analysis of the test in a real campus gigabit network The inner network backbone consists of gigabit ethernet . The mean ratio of network use is below 1% age, and the maximum one comes to 10%. The floating capacity is still good enough to meet network flowing because the mean ratio of inner campus network as outer ones is 30.4% and the maximum one is merely 38.3%. But there appears a security problem. We must make a device blocking illegal approach to the client form outer network It is important that we can a away to manage the campus gigabit network efficiently on the basis of the given data from this performance test.

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The Study of Transmission Performance of Line Code on High Speed Optical Transmission Ethernet (고속 광 이더넷에서 선로 부호에 따른 전송 성능에 대한 연구)

  • Kim Chang-Bong;Ko Je Soo;Kim Ik-Sang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6A
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    • pp.510-516
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    • 2005
  • In this paper, we discuss parameters of line code and simulate a same optical ethernet having minimum bandwidth(MB810) and non-minimum bandwidth line code(8B/10B) to present the possibility of improving of transmission performance using minimum bandwidth line code on the high speed optical ethernet. We design the high speed optical ethernet using Serial type LAN PHY 10GBASE-E(WDM type LAN PHY 10GBASE-LX4) for the single(multi) channel link. To compare the transmission performance of MB810, 8B/10B line code we measure the bit error rate(BER) according to the received optical power of single and multi channel link.

Performance Analysis of Cluster Network Interfaces for Parallel Computing of Computational Fluid Dynamics (전산유체역학 병렬해석을 위한 클러스터 네트웍 장치 성능분석)

  • Lee, Bo Seong;Hong, Jeong U;Lee, Dong Ho;Lee, Sang San
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.31 no.5
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    • pp.37-43
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    • 2003
  • Parallel computing method is widely used in the computational fluid dynamics for efficient numerical analysis. Nowadays, low cost Linux cluster computers substitute for traditional supercomputers with parallel computing shcemes. The performance of nemerical solvers on an Linux cluster computer is highly dependent not on the performance of processors but on the performance of network devices in the cluster system. In this paper, we investigated the effects of the network devices such as Myrinet2000, gigabit ethernet, and fast ethernet on the performance of the cluster system by using some benchmark programs such as Netpipe, LINPACK, NAS NPB, and MPINS2D Navier-Stokes solvers. Finally, upon this investigation, we will suggest the method for building high performance low cost Linux cluster system in the computational fluid dynamics analysis.

Implementation of a TCP/IP Offload Engine Using High Performance Lightweight TCP/IP (고성능 경량 TCP/IP를 이용한 소프트웨어 기반 TCP/IP 오프로드 엔진 구현)

  • Jun, Yong-Tae;Chung, Sang-Hwa;Yoon, In-Su
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.4
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    • pp.369-377
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    • 2008
  • Today, Ethernet technology is rapidly developing to have a bandwidth of 10Gbps beyond 1Gbps. In such high-speed networks, the existing method that host CPU processes TCP/IP in the operating system causes numerous overheads. As a result of the overheads, user applications cannot get the enough computing power from the host CPU. To solve this problem, the TCP/IP Offload Engine(TOE) technology was emerged. TOE is a specialized NIC which processes the TCP/IP instead of the host CPU. In this paper, we implemented a high-performance, lightweight TCP/IP(HL-TCP) for the TOE and applied it to an embedded system. The HL-TCP supports existing fundamental TCP/IP functions; flow control, congestion control, retransmission, delayed ACK, processing out-of-order packets. And it was implemented to utilize Ethernet MAC's hardware features such as TCP segmentation offload(TSO), checksum offload(CSO) and interrupt coalescing. Also we eliminated the copy overhead from the host memory to the NIC memory when sending data and we implemented an efficient DMA mechanism for the TCP retransmission. The TOE using the HL-TCP has the CPU utilization of less than 6% and the bandwidth of 453Mbps.

Design and Implementation of 10Gigabit Ethernet Frame Multiplexer/Demultiplexer (10기가비트 이더넷 프레임 다중화/역다중화기 설계 및 구현)

  • 최창호;주범순;김도연;정해원
    • Proceedings of the IEEK Conference
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    • 2003.07a
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    • pp.378-381
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    • 2003
  • This paper presents a design and implementation of 10gigabit ethernet frame multiplexer/demultiplexer. In this paper, we discuss gigabit and 10 gigabit ethernet standard interfaces(GMII/XGMII) and we propose multiple gigabit ethernet frame multiplexing/demultiplexing scheme to handle 10gigabit ethernet frame instead of using 10gigabit network processor. And then 10gigabit ethernet frame MUX/DMUX is designed, verified and implemented using FPGA.

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Characteristics of active optical ring network and performance evaluation in Bandwidth on Demand (능동형 광 링 네트워크의 특징 및 요구 대역폭에 따른 성능 분석)

  • Lee Sang-Wha;Song Hae-Sang
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.6 s.38
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    • pp.209-218
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    • 2005
  • In this paper, we present an Active Optical Network(AON) . The AON uses the Dense Wavelength Division Multiplexing(DWDM) from optical communication access network of ring type, and will be able to provide the smoothly service in the Bandwidth on Demand by using DWDM. It supports the connection of the multiple wavelength and the Sub-Carrier from the optical gigabit ethernet switch. The Wavelength Add Drop Multiplexer(WADM) extracts a specific wavelength, and composes a node of the ring network. The specific wavelength becomes demultiplexing in the Sub-Carrier and it is distributed in the user The active connection of optical gigabit ethernet switch where the distribution of access network is started and access terminal connection equipment is possible. By the BoD from the AON it compares the buffer size which changes, and it analyzes. Also the Time delay of bit compares with the throughput of server The limit of amount of time is decided. Consequently it will be able to realize the dynamic use protocol and an efficient algorithm of the network.

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A Study on the Synchronization of GFP Signal in NG-SDH System (NG-SDH시스템에서의 GFP 신호동기에 관한 연구)

  • Lee Chang-Ki;Ko Je-Soo
    • The KIPS Transactions:PartC
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    • v.12C no.1 s.97
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    • pp.53-62
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    • 2005
  • The NG-SDH system requires signal synchronization to synchronize incoming ethernet signal with GFP frame. The foreign nation research completes a chipset development until now and it secures a relation technique, but it does not secure a relation technique from domestic. Therefore, in this paper, we presented with signal synchronization method of Ethernet signal through GFP frame. We knew that the synchronized method of Ethernet signal through GFP-F must apply ingress & egress buffer and GFP Idle. We understood that the synchronized method of Ethernet signal through GFP-T must apply GFP Idle and $65B{\_}PAD$, and require maximum 3-bit addition & deletion of idle. Also we showed signal synchronization realization through simulation and obtained MTIE/TDEV characteristics and peak to peak jitter in egress output.

CMOS Transimpedance Amplifiers for Gigabit Ethernet Applications (기가비트 이더넷용 CMOS 전치증폭기 설계)

  • Park Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.4 s.346
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    • pp.16-22
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    • 2006
  • Gigabit transimpedance amplifiers are realihzed in submicron CMOS technologies for Gigabit Ethernet applications. The regulated cascode technique is exploited to enhance the bandwidth and noise performance simultaneously so that it can isolate the large input parasitic capacitance including photodiode capacitance from the determination of the bandwidth. The 1.25Gb/s TIA implemented in a 0.6um CMOS technology shows the measured results of 58dBohm transimpedance gain, 950MHz bandwidth for a 0.5pF photodiode capacitance, 6.3pA/sqrt(Hz) average noise current spectral density, and 85mW power dissipation from a single 5V supply. In addition, a 10Gb/s TIA is realized in a 0.18um CMOS incorporating the RGC input and the inductive peaking techniques. It provides 59.4dBohm transimpedance gain, 8GHz bandwidth for a 0.25pF photodiode capacitance, 20pA/sqrt(Hz) noise current spectral density, and 14mW power consumption for a single 1.8V supply.