• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.2
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• pp.163-171
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• 2016

In order to detect the exact position of high-speed train, it is necessary to obtain location information from the transponder tag installed along the track. In this paper, we proposed parallel descrambling scheme for high-speed railway transponder system, which aims for reducing the processing time required to decode telegram. Since a telegram is stored in a tag after information bits are scrambled by an encoder, decoding procedure includes descrambling of received telegram to recover the original information bits. By analyzing the structure of the descrambling shift register circuit, we proposed a parallel descrambling scheme for fast decoding of telegram. By comparing the required number of clocks, it is shown that the proposed scheme significantly outperforms the original one.

• Journal of the Institute of Convergence Signal Processing
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• v.18 no.2
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• pp.43-48
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• 2017

The underwater transients signals contain the characteristics of complexity, time varying, nonlinear, and short duration. So it is very hard to model for these signals with reference patterns. In this paper we separate the whole length of signals into some short duration of constant length with overlapping frame by frame. The 20th LPC(Linear Predictive Coding) coefficients are extracted from the original signals using Durbin algorithm and applied to neural network. The 65% of whole signals were learned and 35% of the signals were tested in the neural network with two hidden layers. The types of the whales for sound classification are Blue whale, Dulsae whale, Gray whale, Humpback whale, Minke whale, and Northern Right whale. Finally, we could obtain more than 83% of classification rate from the test signals.

• Proceedings of the Korea Contents Association Conference
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• 2018.05a
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• pp.57-58
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• 2018

자본주의가 인류사회의 행복과 공동번영에 기여하는 경제체제로서 역할을 다하려면, 자본주의 역시 시대의 변화에 맞추어 진화해야 한다. 본 논문에서는 새 시대에 걸 맞는 자본주의의 대안을 논의하고자, 저자 이재윤이 창시한 깨달음경영학(MOSEE; Management Of allSelves' Enlightenment and Empowerment)의 새로운 과학적 학문연구를 통해 새로운 실현성 영역을 추구하는 동시에, 깨달음경영의 새로운 5차원 요소인 영적 자원 및 자산(SRA: Spirit Resource and Asset)과 본질적으로 무(無)에서 유(有)를 창조하는 창조경영(MOC: Management Of Creation)에 대한 연구 및 인간의식 성장 방법론에 대하여 발표 하고자 한다. 따라서 깨달음경영학(MOSEE)에 관한 고유한 철학, 고유한 탐구 영역, 이론, 방법, 기법, 도구, 운영 원리 및 활용 분야 등을 체계적으로 설명하는 것이 목적이다. 이로써 현대의 주요한 여러 경영철학들 예컨대 CSV(마이클 포터) SI(개리 함멜) 복잡계 철학 미덕(美德)경영 등의 내재된 구조적 제약들을 분석 평가하고 한계를 극복하는 방안들을 제시함으로써 이들을 5차원의 깨달음경영학(MOSEE)의 의식(영성)경영철학으로써 통섭을 고찰하고 21세기 우주 인류 신문명 창달을 위한 5차원의 깨달음경영 혁명을 성취하고자 한다. 즉 2040년 전에 지구 인류의 고도 영성 초 과학기술 문명을 넘어서 우주 인류의 초 영성 초 과학기술 문명 창달을 선도하는 학문연구 교육 인류 사회활동을 지속적으로 해갈 것이다. 위와 같이 21세기 우주 인류의 영원한 평화 자유 지속적 번영을 이루고자 한다. 본 연구는 통섭 고찰 제1회로 마이클 포토의 공유가치(CSV: Creating Shared Value)의 통섭을 고찰한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.259-262
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• 2006

This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications. The proposed circuit has been designed by using TSMC $0.18{\mu}m$ CMOS process and current-reused two-stage cascade topology. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results shows that the LNA has a extremely low power dissipation of 1.38mW with a $V_{DD}$ of 1.0V. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and noise figure of 1.13dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.4
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• pp.793-801
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• 2000

This paper presents the effect of lightning impulse current on ZnO varistors(390[V], 6.5[kA]) used in low-voltage AC mains as a protective device against transient overvoltages. The electrical characteristics of ZnO varistors are deteriorated by overtime impulse current, and a deteriorated ZnO varistor is brought to a thermal runaway and finally destroyed even in normal operating voltage. Therefore, it is important to estimate the changes of the electrical characteristics of ZnO varistors. A lightning impulse current standardized in IEC 61000-4-5 is applied to the varistors to accelerate deterioration, and the energy applied to the varistor at each time is about 12 [J]. In the experiment, various parameters such as leakage current, reference voltage are measured with the number of applied impulse current. Also, micro-structure changes of the varistors after applying the lightning impulse current of 200 times are compared. The electrical characteristics of the varistors are degraded by overtime impulse current, showing increase in leakage current and decrease in reference voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.5
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• pp.703-717
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• 2002

This paper illustrates the implementation of a scalable shared buffer asynchronous transfer mode (ATM) switch. The designed shared buffer ATM switch has a shared buffet of a pipelined memory which has the access time of 4 ns. The high-speed buffer access time supports a possibility of the implementation of a shared buffer ATM switch which has a large switching capacity. The designed switch architecture provides flexible switching performance and port size scalability with the independence of queue address control from buffer memory control. The switch size and the buffer size of the designed ATM switch can be reconfigured without serious circuit redesign. The designed prototype chip has a shared buffer of 128-cell and 4 ${\times}$ 4 switch size. It is integrated in 0.6um, double-metal, and single-poly CMOS technology. It has 80MHz operating frequency and supports 640Mbps per port.

• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.177-185
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• 2000

In this paper CPLD design of cryptographic coprocessor which implements SEED algorithm is described. To satisfy trade-off between area and speed, the coprocessor has structure in which 1 round operation is divided into three subrounds and then each subround is executed using one clock. To improve clock frequency, online precomputation scheme for round key is used. To apply the coprocessor to various applications, four operating modes such as ECB, CBC, CFB, and OFB are supported. The cryptographic coprocessor is designed using Altera EPF10K100GC503-3 CPLD device and its operation is verified by encryption or decryption of text files through ISA bus interface. It consists of about 29,300 gates and performance of CPLD chip is about 44 Mbps encryption or decryption rate under 18 Mhz clock frequency and ECB mode.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.37 no.12
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• pp.1529-1534
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• 2013

A voice coil actuator with a rotating moving magnet has been developed for a miniaturized mobile robot. The actuator has simple structure comprising a magnet, a coil, and a yoke. Actuator performance is predicted using a linearized theoretical model, and dynamic performance based on the air-gap between the magnet and the coil is predicted using motor constant and restoring constant obtained through finite element simulations. The theoretical model was verified using a prototype with 60 Hz resonance and 80 Hz bandwidth. We found that an input of 1.5 V can make the actuator rotate by $20^{\circ}$ statically. The driving configuration of the proposed actuator can be simplified because of its implementation of open-loop control.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.773-778
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• 2007

In order to resolve problems with the phase error in QPSK demodulator of the digital satellite broadcasting systems, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in Inter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is $175{\mu}W$, NCO with the proposed structure is $24.65{\mu}W$. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• Journal of the Korea Society of Computer and Information
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• v.11 no.3
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• pp.141-149
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• 2006

In this paper, we introduce an improved algorithm for computing matrix triple product that commonly arises in primal-dual optimization method. In computing $P=AHA^{t}$, we devise a single pass algorithm that exploits the block diagonal structure of the matrix H. This one-phase scheme requires fewer floating point operations and roughly half the memory of the generic two-phase algorithm, where the product is computed in two steps, computing first $Q=HA^{t}$ and then P=AQ. The one-phase scheme achieved speed-up of 2.04 on Intel Itanium II platform over the two-phase scheme. Based on memory latency and modeled cache miss rates, the performance improvement was evaluated through performance modeling. Our research has impact on performance tuning study of complex sparse matrix operations, while most of the previous work focused on performance tuning of basic operations.