• Proceedings of the Korea Multimedia Society Conference
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• 1998.04a
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• pp.423-431
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• 1998

이진값을 가지는 이진 시스템을 모델화하고 설계하여 구현할 수 있도록 Petri Net의 한 부류인 박스의 마크수가 최대 1인 안전(safe)한 확장된 마크흐름선도(EMFG : Extended Mark Flow Graph)를 재구성하였다. 레벨박스와 펄스박스 및 게이트박스를 하나의 박스로 통일하였으며, 보존아크를 제거하고 서로 상반되는 개념을 가지는 일반아크와 역아크만을 사용하였고, 특히 트랜지션의 출력아크로 새로이 역아크를 도입함으로써 EMFG의 표현을 명확하게 하였다. 또한 EMFG에서 자기루프를 정의하였다. 그리고 이진 시스템을 모델링한 EMFG를 실제회로로 구현하는 방법이 새로이 제시되었다.

• The Transactions of the Korea Information Processing Society
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• v.5 no.7
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• pp.1896-1907
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• 1998

확장된 마크흐름선도(EMFG: Extednded Mark Flow Graph)는 기존의 MFG를 개선한 그래프로서, 회로변수식에 의해 실제회로로 쉽게 구현가능하므로 이산제어시스템의 모델링과 설계 및 구현의 강력한 도구로 사용될 수 있다. 본 논문은 EMFG의 트랜지션들이 점화하는 과정 및 트랜지션들이 점화완료하였을 때 각 박스들의 마크수 변화를 부울함수식과 벡터를 사용하여 표현하였다. 또한 시스템의 상태변화를 쉽게 판단할 수 있게 하는 EMFG의 동작알고리듬을 제안하였으며, 제안된 알고리듬은 3-비트 증가계수기를 설계한 EMFG와 시간트랜지션이 포함된 가상의 EMFG에서 잘 수행되었다. EMFG의 동작이 부울함수로 해석가능해짐으로 인해 시스템의 분석 및 설계가 용이하며 컴퓨터를 이용한 자동화된 시스템의 분석과 설계가 가능하다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.692-695
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• 2001

The EMFG(Extended Mark Flow Graph) is not only a powerful tool to. designing the discrete-event system conceptually or specifically but also a good representation tool for implementing the system directly. We present a transitions-firing process and automatic changes of the number of marks in each box as a firing determination algorithm with the incident matrix and the state transition equation. The convenient analysis and design of a system as well as Computer Aided Design is possible because the operations of an EMFG ran be represented in the mathematical analysis with ease.

• Journal of Korea Multimedia Society
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• v.1 no.2
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• pp.224-238
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• 1998

The EMFG (Extended Mark Flow Graph) is not only a powerful tool for designing the discrete-event system conceptually or specifically but also a good representation tool for implementing the system directly. But it is difficult to design or analyze the system because the impossibility of mathematical analysis results from some complicated representation of the EMFG. In this paper, therefore we redefined EMFG representations to provide the possibility of mathematical analysis, and employed an output inhibit are of a transition, which makes possible the adequate representations for the indescribable parts. We also solved trouble parts in the circuit translations of the EMFG and proposed the circuit translation method by using the mathematical formula. Finally, we compared the conventional EMFG with the redefined EMFG, and we designed a 0101 detecter with the redefined EMFG and translated it to the corresponding circuit.

• Proceedings of the Korea Multimedia Society Conference
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• 2001.11a
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• pp.815-820
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• 2001

확장된 마크흐름선도(EMFG: Extended Mark Flow Graph)는 이산 시스템을 설계할 수 있는 강력한 도구일 뿐만 아니라 시스템을 직접적으로 구현하기 위한 적당한 표현이다. 본 논문에서는 EMFG의 동작 해석 알고리즘을 개선하여 시간 트랜지션이 존재하는 EMFG의 동작을 분석하고자 한다. 이를 통해 시스템의 분석 및 설계가 용이하며 컴퓨터를 이용한 자동화 시스템의 분석과 설계가 가능하다.

• Proceedings of the Korea Multimedia Society Conference
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• 2002.05c
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• pp.10-15
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• 2002

확장된 마크흐름선도(EMFG : Extended Mark Flow Graph)는 시스템의 동시성이나 병렬성을 잘 표현할 수 있는 방향성 그래프이다. 이를 이용하여 시스템을 모델링하면 개념설계가 가능하고, 상세 동작분석이 용이해짐으로 이산제어시스템이나 시퀀스 제어회로등을 설계할 때 사용될 수 있는 도구이다. 기존 EMFG에서는 타이머에 대한 표기 방법이 미비하여 타이머를 많이 사용하는 분야인 시퀀스제어 설계 및 릴레이 회로의 표현에는 많은 어려움이 있다. 본 논문에서는 타이머 릴레이들의 동작에 대하여 생성지연-소멸 트랜지션, 생성-소멸지연 트랜지션과같이 이중바로 표기된 새로운 트랜지션을 도입하였다. 새로운 트랜지션을 이용하면 타이머들의 동작을 분명하게 표현할 뿐만 아니라 EMFG의 표현을 알고리듬할 수 있다. 그러므로 복잡한 시스템을 모델링할 때 제안된 트랜지션을 이용하면 효율적인 모델링을 할 수 있다.

• The KIPS Transactions:PartD
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• v.10D no.7
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• pp.1189-1196
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• 2003

Owing to the developed If industry, many people are more and more interested in Workflow which is an automated business processing system. In this paper, we present basic structures and various parallel processing structures of a workflow using EMFG (Extended Mark Flow Graph) that makes conceptional design available. And then, We design a workflow with EMFG. We propose the commitability verification method to check whether a workflow can complete or not and the logical bug verification method to find whether invalid components exist or not by using simulation result of it. The proposed EMFG modeling and analysis method for a workflow make it possible to become a visual and formal design. Also, it makes intuitional and mathematical analysis possible.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.11
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• pp.952-957
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• 2003

We propose how to translate relay circuits to the EMFGs(Extended Mark Flow Graphs) formally and analyze the original one by using the mark flow of it. Firstly, the concepts of the output condition, the output-on condition and the output-off condition are introduced in the relay circuits. These can be used to find the structure and the operation of respective relay outputs but the sequential operations of them cannot be obtained from these. Secondly, a relay circuit is translated to the corresponding EMFG as the all output-on conditions and all output-off conditions of it are translated to EMFGs. For the adequate translation, the condition arc and the concepts of the generation transition and the degeneration transition are introduced, and the duality for the simplification of the result. Thirdly, we analyze the operation of the original circuit by analyzing the mark flow of the resulting EMFG. We can achieve easy and fast analysis based on the EMFG's operation algorithm. Finally, we apply these to the relay circuit for an electric furnace and analyze its operation with the mark flow of the resulting EMFG. The formal translation from relay circuits to EMFGs makes the analysis easy so that these results can be used to design, modelling, the fault detection and the maintenance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.179-184
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• 1999

A Timing Diagram is almost used to represent the various signals such as an address bus, a data bus, and the control signals during design and analysis of a digital system. But if so, its representation is somewhat complicated and also it is difficult to analyze the operation of the system. In this paper, we proposed the representation method of timing diagrams with the EMFG(Extended Mark Flow Graph). In the EMFG representation of the system operation, the logical states due to the various signals of the system is graphically represented. Therefore the proposal method allows that it is easy to design as well as analyze the system. As examples applied, we represented the memory read cycle of $\mu$PD70320 CPU and the read cycle of MCM60256A memory with the EMFG.

• The KIPS Transactions:PartD
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• v.12D no.2 s.98
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• pp.327-334
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• 2005

The representation of Web Sites with EMFG(Extended Mark Flow Graph) is studied as a new method that represents the complicated Web Sites structure. The Web Sites usually have the number of iteration structures. The representation of these Web Sites with EMFG is too complicated, and so we can not understand the structure of these Web Sites sometimes. Therefore, in this paper, we classify these iteration structures when express Web Sites by EMFG as serial iteration structures and parallel iteration structures and propose the method that can simplify these iteration structures. Then we can reduce number of boxes, arcs, and transitions, and efficiently design and manage Web Sites by using this method.