• Proceedings of the Korean Information Science Society Conference
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• 1998.10b
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• pp.362-364
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• 1998

집합의 표현 방법에는 원소들을 그대로 가지고 있는 배열 형태와 유한한 집합에 한해서 0.1로써 표현하는 비트 벡터가 있다. 집합의 크기가 매우 클 때는 표현 방법과 연산 처리 기법이 저장 공간 및 처리 시간면에서 문제가 된다. 이 논문에서는 유한집합이지만, 범위가 매우 큰 집합에 대하여 집합 연산의 처리 기법들을 소개하고, 그 성능을 비교해 보고, 범위의 크기가 집합 연산에 참여하는 집합의 원소 수에 따른 좋은 집합 표현 방법과 집합 연산 처리 기법을 소개한다.

• Journal of IKEEE
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• v.4 no.2 s.7
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• pp.288-294
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• 2000

In this paper, an efficient detail extraction technique for a progressive coding scheme is proposed. The existing technique using the top-hat transformation yields an efficient extraction scheme for isolated and visually important details, but yields an inefficient results containing significant redundancy extracting the contour information. The proposed technique using the strong edge feature extraction property of the morphological Laplacian in this paper can reduce the redundancy, and thus provides lower bit-rate. Experimental results show that the proposed technique is more efficient than the existing one, and promise the applicability of the morphological Laplacian operator.

• Journal of IKEEE
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• v.19 no.4
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• pp.590-595
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• 2015

This paper proposes a design of efficient hierarchy structure in the tile based rasterizer. The proposed hierarchy structure avoids unnecessary calls of low level tile at which a calculation is not required. A low level tile is classified into three categories based on its maximum, minimum position, and inside outside test. The necessity of calculations on the corresponding low level tile can be determined by its classification. The overall amount of computations for graphic processing can be reduced by not calling for the low level tile with no calculation. The proposed hierarchy structure can reduce an execution time of graphic processing. It shows higher efficiency with the more vertex density of formulating 3D model.

• The Journal of Engineering Research
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• v.2 no.1
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• pp.31-37
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• 1997

This paper describes the design and implementation of 8 bit ALU graphic simulator which helps students who study the structure and operation course of general ALU. ALU of this paper consists of three parts, arithmetic circuit, logic circuit, and shifter. Each of them performs as follows. Arithmetic circuit performs arithmetic operation such as addition, subtraction, 1 increment, 1 decrement, 2's complement, logic circuit performs logic operation such as OR, AND, XOR, NOT, and shifter performs shift operation and transfers the result of circuits of arithmetic, logic to data bus. The instructions which relate to these basic ALU functions was selected from Z80 instructions and ALU circuit was designed with those instructions and this designed ALU circuit was implemented on graphic screen. And all state of this data operation course in ALU was showed by bit and logic gate unit.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.1
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• pp.166-174
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• 2013

QRS detection of ECG is the most popular and easy way to detect cardiac-disease. But it is difficult to analyze the ECG signal because of various noise types. The important problem in recording ECG signal is a baseline wandering, which is occurred by rhythm of respiration and muscle contraction attaching to an electrode. Particularly, in the healthcare system that must continuously monitor people's situation, it is necessary to process ECG signal in realtime. In other words, the design of algorithm that exactly detects QRS region using minimal computation by analyzing the person's physical condition and/or environment is needed. Therefore, baseline wander removing method based on morphological filter for efficient QRS detection method is presented in this paper. For this purpose, we detected QRS through the preprocessing method using morphological filter, adaptive threshold, and window. The signal distortion ratio of the proposed method is compared with other filtering method. Also, R wave detection is evaluated by using MIT-BIH arrhythmia database. Experiment result show that proposed method removes baseline wanders effectively without significant morphological distortion.

• Journal of Korea Spatial Information System Society
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• v.9 no.3
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• pp.1-16
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• 2007

A spatial data warehouse is a system to support decision making using a spatial data cube. A spatial data cube is composed of a dimension table and a fact table. For decision support using this spatial data cube, the concept hierarchy of spatial dimension and the summarized information of spatial fact should be provided. In the previous researches, however, spatial summarized information is deficient. In this paper, the spatial aggregation for spatial summarized information in a spatial data warehouse is proposed. The proposed spatial aggregation is separated of both the numerical aggregation and the object aggregation. The numerical aggregation is the operation to return a numerical data as a result of spatial analysis and the object aggregation returns the result represented to object. We provide the extended struct of spatial data for spatial aggregation and so our proposed method is efficient.

• Journal of the Korea Society of Computer and Information
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• v.19 no.8
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• pp.107-117
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• 2014

This paper proposed the method of removing baseline drift by eliminating local maxima such as P, R, T-wave signal region and local minima Q, S-wave signal region. We applied morphology-pair operations improved from morphology operation to the ECG signal. To eliminate overshoot in the result of morphology-pair operation, we apply median value operation to the result of morphology-pair operation. We use MIT/BIH database to estimate the proposed algorithm. Experiment result show that proposed algorithm removing baseline drift effectively without orignal ECG signal distortion.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2015.07a
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• pp.552-554
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• 2015

본 논문은 AVX2 (Advanced Vector eXtension 2) 명령어 집합을 이용하여 HEVC (High Efficiency Video Coding) 복호화기의 역-변환 모듈을 고속화하는 방법을 제안한다. AVX2 명령어 집합은 256 비트 레지스터를 사용하여 다수의 데이터를 한번의 명령을 통해 병렬적으로 연산할 수 있으며 반복적인 산술 연산 혹은 논리 연산 구조에서 효율적이다. 제안하는 방법은 AVX2 명령어 집합을 이용하여 $8{\times}8{\sim}32{\times}32$ 크기의 TU (Transform Unit) 단위로 수행되는 역-변환 연산을 행렬의 곱 형태로 연산하여 고속화하였다. 실험 결과 AVX2 명령어 집합을 이용한 역-변환 연산은 Chen 알고리즘에 비해 평균 51% 속도 향상을 보였으며 SSE (Streaming SIMD Extension) 명령어 집합을 이용한 연산에 비해 평균 20%의 속도 향상 결과를 얻을 수 있었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04a
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• pp.791-794
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• 2002

본 연구는 영상분석에서 이진 영상의 잡음제거 및 에지 검출을 위한 연구로 임펄스 잡음이 존재하는 영상의 잡음 제거는 임펄스가 크거나 잡음 에너지가 상대적으로 작을 때는 기존의 메디언 필터를 이용하여 잡음을 제거하지만 임펄스 잡음과 같지 않는 잡음이 존재하는 경우에는 본 연구에서 제안한 형태학적인 연산을 적용하여 잡음을 제거하고, 에지를 검출하는 방법을 제안한다.

• The KIPS Transactions:PartC
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• v.17C no.3
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• pp.233-242
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• 2010

In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate results in the algorithm computations(encryption, decryption) are well-known. In case of SEED block cipher, it uses 32 bit arithmetic addition and S-box operations as non-linear operations. Therefore the masking type conversion operations, which require some operating time and memory, are required to satisfy the masking method of all non-linear operations. In this paper, we propose a new masked S-boxes that can minimize the number of the masking type conversion operation. Moreover we construct just one masked S-box table and propose a new formula that can compute the other masked S-box's output by using this S-box table. Therefore the memory requirements for masked S-boxes are reduced to half of the existing masking method's one.