• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.3
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• pp.55-61
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• 2000

This paper presents an efficient hardware architecture of frame memory interface in MPEG-2 video encoder. To reduce the size of memory buffers between SDRAM and the frame memory module, the number of clocks needed for each memory access is minimized with dual bank operation and burst length change. By allocating the remaining cycles not used by SDRAM access, to the random access cycle, the internal buffer size, the data bus width, and the size of the control logic can be minimized. The proposed architecture is operated with 54MHz clock and designed with the VT $I^{тм}$ 0.5 ${\mu}{\textrm}{m}$ CMOS TLM standard cell library. It is verified by comparing the test vectors generated by the c-code model with the simulation results of the synthesized circuit. The buffer area of the proposed architecture is reduced to 40 % of the existing architecture.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.120-127
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• 2005

The design method of the transversal filter using continuously cascaded directional couplers is presented. The coupler can be treated for a continuously varying nonuniform coupled transmission line. The design method is based on the optimum extraction of desired coupling factor by the control of null positions which are inherent to the coupling spectra pattern. In the optimization process, the improved Woodward-Lawson sampling method is applied to easily synthesize the distributed delay and weighting elements for transversal filter properties. For application, the microstrip transversal filter is fabricated and optimum dielectric overlay is introduced for the mode phase velocity compensation for non-TEM coupler nodes by using SDA(Spectral Domain Approach). Experiment results confirm the validity of the proposed method.

• Journal of Plant Biotechnology
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• v.45 no.3
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• pp.257-265
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• 2018

Sweetener is one of the additives that makes you feel sweet. Artificial sweeteners and sugar are typical examples, and sweetness proteins with sweetness characteristics have been widely studied. These studies elucidated the transformation lettuce cells with Agrobacterium method for stable production of natural sweet proteins, brazzein, thaumatin, and miraculin. In this paper, we report use of a plant expression system for production of sweet proteins. A synthetic gene encoding sweet proteins was placed under the control of constitutive promoters and transferred to lettuce. High and genetically stable expression of sweetener was confirmed in leaves by RT-PCR and Western blot analysis. Sweet proteins expressed in transgenic lettuce had sweetness-inducing activity. Results demonstrate recombinant sweet proteins correctly processed in transgenic lettuce plants, and that this production system could be a viable alternative to production from the native plant.

• Journal of the Korean Society for Nondestructive Testing
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• v.35 no.5
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• pp.299-306
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• 2015

A conventional phased array system can control an ultrasonic beam electronically by adjusting the excitation time delay of individual elements in a multi-element probe and produce an ultrasonic image. In Contrast, full matrix capture (FMC) is a data acquisition process that allows receiving ultrasonic signals from one single shot of the phased array transducer element through all the other elements and captures the complete dataset from every possible transmit-receive combination. This FMC data can be used to create the ultrasonic image in post processing. It is possible to produce not only images equivalent to conventional phased array image but also total focusing method (TFM) images with improved resolution and sharpness, which is virtually focused at any point in a region of interest. In this paper, the system that can perform FMC by using a conventional phased array instrument is developed, and a study was conducted on the imaging algorithms to reconstruct sector B-scan and TFM images from FMC dataset.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.103-108
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• 2006

This paper proposed a low power resource allocation algorithm for the minimum switching activity of operators in high level synthesis. In this paper, the proposed method finds switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity was found the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and maximal control step. And it is the reduction effect from 8.5% to 9.3%.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.134-140
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• 2006

This paper proposed a low power resource allocation algorithm for the minimum switching activity of operators in high level synthesis. In this paper, the proposed method finds switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity was found the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and maximal control step. And it is the reduction effect from 8.5% to 9.3%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.38-48
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• 2006

In this paper, we developed a hardware architecture of Reed-Solomon RS(255,239) decoder for the DMB mobile terminals. The DMB provides multimedia broadcasting service to mobile terminals, hence it should have small dimension for low power and short decoding delay for real-time processing. We modified Euclid algorithm to apply it to the key equation solving which is the most complicated part of the RS decoding. We also designed a small finite field divider to avoid the use of large Inverse-ROM table, and it consumed 17 clocks. After synthesis with Synopsis on Samsung STD130 $0.18{\mu}m$ Standard Cell library, the Euclid block had 30,228 gates and consumed 288 clocks, which gave the 25% reduced area compared to other existing designs. The size of the entire RS decoder was about 45,000 gates.

• Journal of Korean Society of Steel Construction
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• v.28 no.4
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• pp.223-229
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• 2016

This study proposes a new technology for a smart damper with flag-shaped behavior using the combination of magnetic friction and rubber springs. The magnet provides friction and, thus, energy dissipation, and the rubber springs with precompression contribute to present self-centering capacity of the damper. To verify their performance, this study conducts dynamic tests of magnet frictional dampers and precompressed rubber springs. For the purpose, hexahedron Neodymium (NdFeB) magnets and polyurethane rubber cylinders are used. In the dynamic tests, loading frequency varies from 0.1 to 2.0 Hz. The magnets provide almost perfect rectangular behavior in force-deformation curve. The rubber springs are tested without or with precompression. The rubber springs show larger rigid force with increasing precompression. Lastly, this study discusses combination of rigid-elastic behavior and friction to generate 'flag-shaped' behavior for a smart damper and suggests how to combine the magnets and the rubber springs to obtain the flag-shaped behavior.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.5
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• pp.810-816
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• 2001

This paper proposes a Truncated Type-II Hybrid ARQ scheme using an adaptive modulation system to achieve high throughput data transmission systems for mobile communication systems. In this paper, the adaptive modulation system analyzed in Nakagami (m-distribution) fading channel environment. The adaptive modulation system controls the modulation level and symbol rate according to the Nakagami fading parameter(m). When the received $E_bN_0$ is high or the Nakagami fading parameter m is high, the propose system selects higher modulation level and higher symbol rate to increase throughput. On the other hand, this system selects lower modulation level and lower symbol rate to prevent throughput performance degradation when the received $E_bN_0$ is low. The modulation method have been adopted QPSK(Quadrature Phase Shift Keying), 16 QAM(Quadrature Amplitude Modulation), 64 QAM, 256 QAM. Therefore, Adaptive Modulation Systems with Truncated Type-II Hybrid ARQ Scheme is proper for mobile and radio for mobile and radio data communication system that require high reliability and delay-limited applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.11
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• pp.1217-1224
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• 2009

This paper newly proposes a methodology towards computing antenna element weights which are satisfying asymmetric sidelobe levels(SLLs) specified arbitrarily on both sides of the main beam pattern, in the linear phased array antenna pattern synthesis problem. Opposite to the conventional methods in which the element weights are directly optimized from the array factor, this method is based on the optimum perturbations of complex roots inherent to the Schelkunoff's polynomial form which is described for the array factor. From the proposed methodology, the capability of nulling the directions of multiple jammers is also possible by independently perturbing only the complex roots corresponding to each jamming direction, hence allowing an enhancement of the simplicity of the numerical procedure by means of a proper reduction of the dimension of the solution space. The complex weights over the array are then easily computed by substituting the optimally perturbed complex roots to the Schelkunoff's polynomial. Some examples are examined and numerically verified by substituting the extracted weights into the array factor equation.