• Title/Summary/Keyword: 합성 제어

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Double Talk Detection using the Fuzzy Inference (퍼지 추론을 이용한 동시통화 검출)

  • 류근택;배현덕
    • Journal of Broadcast Engineering
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    • v.5 no.1
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    • pp.123-129
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    • 2000
  • This paper addresses a new double detection algorithm which is based on the fuzzy control in the adaptive echo canceller of communication system. In this method, the two input of the fuzzy inference for detecting double talk condition are used. The one is the cross-correlation coefficient between the error signal and the primary signal which is the summed signal of the real echo signal and the near-end signal. The other is the cross-correlation coefficient between the estimation error signal and the primary signal. The fuzzy controller made a fuzzification for two inputs by the membership functions of trapezoid and them became the composition using inference rules. The composed result is defuzzificated by the center gravity method. The output is compared with two threshold values to detect double talk and echo path variation effectively. It is confirmed by computer simulation that this fuzzy double talk detector is able to track echo path variation accurately.

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A Study on the Predistortion Linearizer Controlled by the Individual Order with Frequency Multiplier (주파수 체배기를 이용한 개별 차수 조정 전치왜곡 선형화기의 설계 및 구현)

  • 민준기;이기학;이근태;안창돈;홍의석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.1019-1024
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    • 2003
  • In the thesis, we propose a new type of the predistortion linearizer using frequency multiplier The linearizer utilizing the 2nd and 3th harmonic used the individual control of the 3rd and 5th order intermodulation distortion(IMD) component. This structure is composed of wilkinson power combiner for combine and isolation of output signal, 3rd order IMD product controller using doubler and 5th order IMD product controller using tripler. The proposed predistortion linearizer controlled by individual order is obtained for about -16 dBc and 18 dBc of 3rd order and 5th order IMD components, respectively, over the frequency band 870 MHz to 880 MHz at the output power of 34 dBm/tone.

A Resource-Constrained Scheduling Algorithm for High Level Synthesis (상위레벨 회로합성을 위한 자원제한 스케줄링 알고리즘)

  • Hwang In-Jae
    • Journal of the Institute of Convergence Signal Processing
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    • v.6 no.1
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    • pp.39-44
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    • 2005
  • Scheduling for digital system synthesis is assigning each operation in a control/data flow graph(CDFG) to a specific control step without violating precedence relation. It is one of the most important tasks due to its direct influence on the performance of the hardware synthesized. In this paper, we propose a resource-constrained scheduling algorithm. Our algorithm first analyzes the given CDFG to determine the number of functional units of each type, then assigns each operation to a control step while satisfying the constraints. It also tries to improve the solution iteratively by adjusting the number of functional units using the results collected from the previous scheduling. Experiments were performed to test the performance of the proposed algorithm, and results are presented

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CNN-LSTM based Autonomous Driving Technology (CNN-LSTM 기반의 자율주행 기술)

  • Ga-Eun Park;Chi Un Hwang;Lim Se Ryung;Han Seung Jang
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.6
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    • pp.1259-1268
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    • 2023
  • This study proposes a throttle and steering control technology using visual sensors based on deep learning's convolutional and recurrent neural networks. It collects camera image and control value data while driving a training track in clockwise and counterclockwise directions, and generates a model to predict throttle and steering through data sampling and preprocessing for efficient learning. Afterward, the model was validated on a test track in a different environment that was not used for training to find the optimal model and compare it with a CNN (Convolutional Neural Network). As a result, we found that the proposed deep learning model has excellent performance.

VLSI Architecture of General-purpose Memory Controller for Multiple Processing (다수의 프로세싱 유닛 처리를 위한 범용 메모리 제어기의 구조)

  • Lee, Yoon-Hyuk;Seo, Young-Ho;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.12
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    • pp.2632-2640
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    • 2011
  • In this paper, we implemented a memory controller which can accommodate data processing blocks. The memory controller is arbitrated by the internal arbiter which receives request signals from masters and sends grant and data signals to masters. The designed memory controller consists of Master Interface, Master Arbitrator, Memory Interface, Memory accelerator. It was designed using VHDL, and verified using the memory model of SAMSING Inc. For FPGA synthesis and verification, Quartus II of ATERA Inc. was used. The target device is Cyclone II. For simulation, ModelSim of Cadence Inc was used.

VLSI Design of a Bus Interface Controller for 32-bit RISC microprocessor (32비트 RISC 마이크로프로세서를 위한 버스 인터페이스 제어기의 설계)

  • Heo, Sang-Kyong;An, Sang-Jun;Jeong, Wook-Yeong;Kim, Young-Jun;Lee, Yong-Surk
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.341-344
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    • 1999
  • 본 논문에서는 DSP 기능을 내장한 32비트 RISC 마이크로프로세서를 위한 버스 제어기를 설계하였다. 연구의 초점은 버스 타이밍, 주소 멀티플렉싱, 리프레쉬, 버스 중재 등을 제어하는 버스제어기를 온칩화 하여 CPU로 하여금 외부 램과 추가적인 장치없이 직접 연결될 수 있도록 한 것이다. 버스 제어기가 관리하는 메모리의 종류는 SRAM, ROM, DRAM, EDO DRAM이며 고속 모드(Fast page mode, EDO page mode 및 RAS-down mode)기능을 지원하며 다양한 Wait를 넣을 수 있다. 주소 영역은 4가지(EMAO-EMA3)이며 내부적으로 7개 의 레지스터가 있고 이들을 이용하여 서로 연결된 세 개의 상태 머신으로 모든 램과의 타이밍을 제어함으로써 공유블록을 활용할 수 있었다. Verilog HDL의 기술하고 Synopsys로 합성한 후 타이밍 검증을 수행한 결과 최악조건에서 53.1㎒로 동작할 수 있었다. 그 후 0.6㎛ single poly triple metal process 공정으로 레이아웃 되었고 면적은 44㎜ × 1.21㎜ 이다.

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A Study on the Structural Analysis of Controllability in Chemical Processes (화학 공정의 제어성의 구조적 분석에 관한 연구)

  • Lee Byung Woo;Kim Yoon Sik;Yoon En Sup
    • Journal of the Korean Institute of Gas
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    • v.3 no.1
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    • pp.27-32
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    • 1999
  • Chemical processes are highly nonlinear, multivariable systems and have complex structures. However, the controllability evaluation procedures are complicated, and the required information is very often unknown at the early design stage. Therefore, it is necessary to develop a procedure to evaluate and enhance controllability while designing processes and plants. To evaluate controllability in the design stage, it is most efficient to analyze process structure. Relative order can be used as a measure of 'physical closeness' between input and output variable. Structural controllability analysis using relative order is shown to be effective in a case study of heat exchanger network synthesis.

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CVD를 이용한 수직으로 정렬된 탄소나노튜브의 합성과 성장한계에 관한 메커니즘

  • Park, Sang-Eun;Song, U-Seok;Kim, Yu-Seok;Song, In-Gyeong;Lee, Su-Il;Park, Jong-Yun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.615-615
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    • 2013
  • 탄소나노튜브(carbon nanotubes; CNT)는 강철보다 10~100배 견고할 뿐만 아니라 영률과 탄성률 은 각각 1.8 TPa, 1.3 TPa에 달하는 매우 우수한 기계적 강도를 지니고 있으며, 구리보다 좋은 전기 전도도와 다이아몬드의 2배에 이르는 열전도도를 지닌 물질이다. 이러한 탄소나노튜브의 우수한 특성을 이용하여 나노섬유, 고분자-탄소나노튜브의 고기능 복합체, 나노소자, 전계방출원(field emitter), 가스센서 등 다양한 분야로의 활용을 위한 연구가 진행되고 있다. 특히, 수백 ${\mu}m$ 이상의 길이로 수직 성장된 탄소나노튜브(VA-CNTs)의 합성은 길이 대 직경의 비(aspect ratio)가 비약적으로 증가하여 앞서 언급한 분야로의 활용이 더욱 유리하며, 그 중에서도 대량 생산, 나노섬유 및 나노복합체로서의 활용에 극히 유용하다. 최근에는 열 화학기상증착(thermal chemical vapor deposition; TCVD)법을 이용하여 탄소나노튜브의 구조를 제어하는 연구들이 많이 보고되고 있다. 열 화학기상증착을 이용한 수직 정렬된 탄소나노튜브의 합성에서 합성조건의 변화는 탄소나노튜브의 길이, 벽의 수, 직경, 결정성 등 구조에 큰 영향을 미친다. 탄소나노튜브는 이러한 구조에 따 라 물리적 특성이 달라지기 때문에 다양한 분야로의 응용을 위해서는 합성에 대한 근본적인 이해 가 절실히 요구된다. 본 연구에서는 열 화학기상증착법을 이용한 합성에서 성장압력의 변화에 따른 탄소나노튜브의 구조적 특성을 조사하였다. 성장압력의 변화는 탄소나노튜브의 밀도, 길이, 결정성에 큰 영향을 미치는 것을 주사전자현미경과 라만분광법을 이용하여 확인하였다. 이러한 결과 는 탄소나노튜브 박막(CNT forest)의 가장자리(edge)에 비정질 탄소(amorphous carbon)의 흡착으로 인한 나노튜브사이의 간격(intertube distance)이 좁아짐에 따른 가스공급 차단 효과로 설명이 가능 하다. 또한, 마이크로웨이브 플라즈마 화학기상증착법을 이용하여 탄소나노튜브를 합성하였다. 합성과정 중 산소(O2)를 주입 하였을 경우, 그렇지 않은 경우에 비하여 성장 속도가 증가하여 3시간 합성 시 2 mm가 넘는 수직 정렬된 탄소나노튜브를 합성 할 수 있었다. 이러한 결과는 과잉 공급 되어 탄소나노튜브로 합성되지 못하고 촉매금속의 표면과 탄소나노튜브의 벽에 비정질의 형태로 붙어있는 탄소 원자들을 추가 주입해 준 산소에 의하여 CO 또는 CO2 형태로 제거해 줌으로써 활성화된 촉매금속의 반응 시간을 향상 시켜주어 탄소공급이 원활하게 이루어졌기 때문이라 생각된다.

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Singing Voice Synthesis Using HMM Based TTS and MusicXML (HMM 기반 TTS와 MusicXML을 이용한 노래음 합성)

  • Khan, Najeeb Ullah;Lee, Jung-Chul
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.5
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    • pp.53-63
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    • 2015
  • Singing voice synthesis is the generation of a song using a computer given its lyrics and musical notes. Hidden Markov models (HMM) have been proved to be the models of choice for text to speech synthesis. HMMs have also been used for singing voice synthesis research, however, a huge database is needed for the training of HMMs for singing voice synthesis. And commercially available singing voice synthesis systems which use the piano roll music notation, needs to adopt the easy to read standard music notation which make it suitable for singing learning applications. To overcome this problem, we use a speech database for training context dependent HMMs, to be used for singing voice synthesis. Pitch and duration control methods have been devised to modify the parameters of the HMMs trained on speech, to be used as the synthesis units for the singing voice. This work describes a singing voice synthesis system which uses a MusicXML based music score editor as the front-end interface for entry of the notes and lyrics to be synthesized and a hidden Markov model based text to speech synthesis system as the back-end synthesizer. A perceptual test shows the feasibility of our proposed system.

An emotional speech synthesis markup language processor for multi-speaker and emotional text-to-speech applications (다음색 감정 음성합성 응용을 위한 감정 SSML 처리기)

  • Ryu, Se-Hui;Cho, Hee;Lee, Ju-Hyun;Hong, Ki-Hyung
    • The Journal of the Acoustical Society of Korea
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    • v.40 no.5
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    • pp.523-529
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    • 2021
  • In this paper, we designed and developed an Emotional Speech Synthesis Markup Language (SSML) processor. Multi-speaker emotional speech synthesis technology that can express multiple voice colors and emotional expressions have been developed, and we designed Emotional SSML by extending SSML for multiple voice colors and emotional expressions. The Emotional SSML processor has a graphic user interface and consists of following four components. First, a multi-speaker emotional text editor that can easily mark specific voice colors and emotions on desired positions. Second, an Emotional SSML document generator that creates an Emotional SSML document automatically from the result of the multi-speaker emotional text editor. Third, an Emotional SSML parser that parses the Emotional SSML document. Last, a sequencer to control a multi-speaker and emotional Text-to-Speech (TTS) engine based on the result of the Emotional SSML parser. Based on SSML which is a programming language and platform independent open standard, the Emotional SSML processor can easily integrate with various speech synthesis engines and facilitates the development of multi-speaker emotional text-to-speech applications.