• Title/Summary/Keyword: 합성 알고리즘

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Convert 2D Video Frames into 3D Video Frames (2차원 동영상의 3차원 동영상 변화)

  • Lee, Hee-Man
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.6
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    • pp.117-123
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    • 2009
  • In this paper, An algorithm which converts 2D video frames into 3D video frames of parallel looking stereo camea is proposed. The proposed algorithm finds the disparity information between two consecutive video frames and generates 3D video frames from the obtained disparity maps. The disparity information is obtained from the modified iterative convergence algorithm. The method of generating 3D video frames from the disparity information is also proposed. The proposed algorithm uses coherence method which overcomes the video pattern based algorithms.

Resynthesis of Logic Gates on Mapped Circuit for Low Power (저전력 기술 매핑을 위한 논리 게이트 재합성)

  • 김현상;조준동
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.11
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    • pp.1-10
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    • 1998
  • The advent of deep submicron technologies in the age of portable electronic systems creates a moving target for CAB algorithms, which now need to reduce power as well as delay and area in the existing design methodology. This paper presents a resynthesis algorithm for logic decomposition on mapped circuits. The existing algorithm uses a Huffman encoding, but does not consider glitches and effects on logic depth. The proposed algorithm is to generalize the Huffman encoding algorithm to minimize the switching activity of non-critical subcircuits and to preserve a given logic depth. We show how to obtain a transition-optimum binary tree decomposition for AND tree with zero gate delay. The algorithm is tested using SIS (logic synthesizer) and Level-Map (LUT-based FPGA lower power technology mapper) and shows 58%, 8% reductions on power consumptions, respectively.

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A Circuit Complexity Optimization ILP Algorithm of High-level Synthesis System for New Multiprocessor Design (새로운 멀티프로세서 디자인을 위한 상위수준합성 시스템의 회로 복잡도 최적화 ILP 알고리즘)

  • Chang, Jeong-Uk;Lin, Chi-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.3
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    • pp.137-144
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    • 2016
  • In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.

Design of a Controller for a Flexible Manipulator Using Fuzzy Theory and Genetic Algorithm (피지이론과 유전알고리츰의 합성에 의한 Flexible Manipulator 제어기 설계)

  • Lee, Kee-Seong;Cho, Hyun-Chul
    • Journal of the Korean Institute of Intelligent Systems
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    • v.12 no.1
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    • pp.61-66
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    • 2002
  • A position control algorithm for a flexible manipulator is studied. The proposed algorithm is based on a fuzzy theory with a Steady State Genetic Algorithm(SSGA) and an Adaptive Genetic Algorithms(AGA). The proposed controller for a flexible manipulator have decreased 90.8%, 31.8%, 31.3% in error when compared with a conventional fuzzy controller, fuzzy controller using neural network, fuzzy controller using evolution strategies, respectively when the weight and the velocity of end-point are 0.8k9 and 1m/s, respectively.

Evolvable Hybrid-ware using FPGA (FPGA를 이용한 진화 하이브리드웨어)

  • 김태훈;이동욱;심귀보
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.05a
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    • pp.51-54
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    • 2003
  • 진화하드웨어는 하드웨어 스스로 진화하여 필요한 회로를 구성한다 회로를 재구성하기 위해서 유전자 알고리즘을 사용한다. 유전자 알고리즘(Genetic Algorithm)은 전역적 탐색을 통하여 해를 구한다. 하지만 유전자 알고리즘은 많은 개체의 평가를 통하여 이루어지기 때문에 수행하는데 시간이 많이 소요된다. 이전의 연구에서 유전자 알고리즘 프로세서를 이용하여 진화하드웨어를 구성했다. 유전자 알고리즘 프로세서는 유연성이 떨어지고 범용적으로 사용하기 어렵다. 본 논문에서는 CPU를 이용하여 유전자 알고리즘 프로세서를 소프트웨어로 제어하는 방법을 제안한다 소프트웨어로 합성한 신호로 GAP의 동작을 제어하기 때문에 유연성을 가질 수 있다 FPGA에 CPU와 유전자 알고리즘 프로세서를 구현하여 one-chip 하드웨어를 구현한다.

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Super-resolution Algorithm Using Adaptive Unsharp Masking for Infra-red Images (적외선 영상을 위한 적응적 언샤프 마스킹을 이용한 초고해상도 알고리즘)

  • Kim, Yong-Jun;Song, Byung Cheol
    • Journal of Broadcast Engineering
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    • v.21 no.2
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    • pp.180-191
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    • 2016
  • When up-scaling algorithms for visible light images are applied to infrared (IR) images, they rarely work because IR images are usually blurred. In order to solve such a problem, this paper proposes an up-scaling algorithm for IR images. We employ adaptive dynamic range encoding (ADRC) as a simple classifier based on the observation that IR images have weak details. Also, since human visual systems are more sensitive to edges, our algorithm focuses on edges. Then, we add pre-processing in learning phase. As a result, we can improve visibility of IR images without increasing computational cost. Comparing with Anchored neighborhood regression (A+), the proposed algorithm provides better results. In terms of just noticeable blur, the proposed algorithm shows higher values by 0.0201 than the A+, respectively.

Synthesizing Imperative Programs from Examples (예제로부터 명령형 프로그램을 합성하는 방법)

  • So, Sunbeom;Choi, Tae-Hyoung;Jung, Jun;Oh, Hakjoo
    • Journal of KIISE
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    • v.44 no.9
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    • pp.986-991
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    • 2017
  • In this paper, we present a method for synthesizing imperative programs from input-output examples. Given (1) a set of input-output examples, (2) an incomplete program, and (3) variables and integer constants to be used, the synthesizer outputs a complete program that satisfies all of the given examples. The basic synthesis algorithm enumerates all possible candidate programs until the solution program is found (enumerative search). However, it is too slow for practical use due to the huge search space. To accelerate the search speed, our approach uses code optimization and avoids unnecessary search for the programs that are syntactically different but semantically equivalent. We have evaluated our synthesis algorithm on 20 introductory programming problems, and the results show that our method improves the speed of the basic algorithm by 10x on average.

2.4kbps Speech Coding Algorithm Using the Sinusoidal Model (정현파 모델을 이용한 2.4kbps 음성부호화 알고리즘)

  • 백성기;배건성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3A
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    • pp.196-204
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    • 2002
  • The Sinusoidal Transform Coding(STC) is a vocoding scheme based on a sinusoidal model of a speech signal. The low bit-rate speech coding based on sinusoidal model is a method that models and synthesizes speech with fundamental frequency and its harmonic elements, spectral envelope and phase in the frequency region. In this paper, we propose the 2.4kbps low-rate speech coding algorithm using the sinusoidal model of a speech signal. In the proposed coder, the pitch frequency is estimated by choosing the frequency that makes least mean squared error between synthetic speech with all spectrum peaks and speech synthesized with chosen frequency and its harmonics. The spectral envelope is estimated using SEEVOC(Spectral Envelope Estimation VOCoder) algorithm and the discrete all-pole model. The phase information is obtained using the time of pitch pulse occurrence, i.e., the onset time, as well as the phase of the vocal tract system. Experimental results show that the synthetic speech preserves both the formant and phase information of the original speech very well. The performance of the coder has been evaluated in terms of the MOS test based on informal listening tests, and it achieved over the MOS score of 3.1.

A Study on the Partition and Coloring Algorithm of the PCB Circuits (PCB 회로의 분할 및 착색 알고리즘에 관한 연구)

  • 김현호
    • Proceedings of the Korea Society for Simulation Conference
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    • 1999.04a
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    • pp.122-126
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    • 1999
  • 시스템 레벨 PCB(Printed Circuit Board) 디자인은 최종적인 시스템 특성에 정확한 정보를 갖지 못하는 디자인 결정을 하기 위해 여러 가지 정보가 필요하다. 또한 분할 할 때 분할 시간과 방법은 매우 중요하고 합성 결과의 특성은 교환(tradeoffs)과 디자인 결정에 매우 민감하다. 그러므로 만일 디자인이 합성되고 단일 보드로 디자인된다 할지라도 후에 다중 보드로 분할 될 수 있다. 따라서 본 논문에서는 PCB회로 디자인의 제약구동 방법중 off-critical-path 분할기법을 사용한 휴리스틱(heuristic) 방법을 제안했고 교환 그래프 착색 알고리즘을 제안했다.

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The Development of Speech Synthesizer In Korean TTS System (한국어 문어변환 시스템 내에서의 음성 합성기 개발)

  • 강찬희;진용옥
    • The Journal of the Acoustical Society of Korea
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    • v.12 no.2
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    • pp.14-27
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    • 1993
  • 본 논문은 매 40ms 정도의 음성파형으로부터 추출된 6내지 9ms 정도의 1피치주기 파형을 합성단위로 사용하여 합성시킨 시간영역에서의합성방식을 한국어 문어 변환 시스템내에서의 음성합성기에 적용시킨 연구결과이다. 시험 결과, 4가지 유형의 한국어 음절 합성이 가능하고, 장단강약과 같은 운율요소의 제어가 용이하고, 또한 합성 알고리즘이 간단하여 실시간 처리가 가능하였으나, 문장 단위의 음성을 합성하기 위하여는 문장내에서의 다양한 피치 패턴에 대한 연구와 이의 효율적인 제어에 관한 연구가 이루어져야 할 것이다. 합성음에 대한 평가방법으로는 원음과 합성음에 대한 시간영역에서의 파형비교, 주파수 영역에서의 스펙트럼 포락선 유사성 비교 및 합성음에 대한 청취도 실험을 행하였다.

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