• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.166-174
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• 2010

SSDs are one of the best media to support portable and desktop computers' storage devices. Their features include non-volatility, low power consumption, and fast access time for read operations, which are sufficient to present flash memories as major database storage components for desktop and server computers. However, we need to improve traditional index management schemes based on B-Tree due to the relatively slow characteristics of flash memory operations, as compared to RAM memory. In order to achieve this goal, we propose a new index management scheme based on a compressed hot-cold clustering called CHC-Tree. CHC-Tree-based index management improves index operation performance by dividing index nodes into hot or cold segments and compressing pointers and keys in the index nodes and clustering the hot or cold segments. The offset compression techniques using unused free area in cold index node lead to reduce the number of slow erase operations in index node insert/delete processes. Simulation results show that our scheme significantly reduces the write and erase operation overheads, improving the index search performance of B-Tree by up to 26 percent, and the index update performance by up to 23 percent.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.310-310
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• 2016

최근 NAND flash memory는 높은 집적성과 데이터의 비휘발성, 낮은 소비전력, 간단한 입, 출력 등의 장점들로 인해 핸드폰, MP3, USB 등의 휴대용 저장 장치 및 노트북 시장에서 많이 이용되어 왔다. 특히, 최근에는 smart watch, wearable device등과 같은 차세대 디스플레이 소자에 대한 관심이 증가함에 따라 유연하고 투명한 메모리 소자에 대한 연구가 다양하게 진행되고 있다. 대표적인 플래시 메모리 소자의 구조로 charge trapping type flash memory (CTF)가 있다. CTF 메모리 소자는 trap layer의 trap site를 이용하여 메모리 동작을 하는 소자이다. 하지만 작은 window의 크기, trap site의 열화로 인해 메모리 특성이 나빠지는 문제점 등이 있다. 따라서 최근, trap layer에 다양한 물질을 적용하여 CTF 소자의 문제점을 해결하고자 하는 연구들이 진행되고 있다. 특히, 산화물 반도체인 zinc oxide (ZnO)를 trap layer로 하는 CTF 메모리 소자가 최근 몇몇 보고 되었다. 산화물 반도체인 ZnO는 n-type 반도체이며, shallow와 deep trap site를 동시에 가지고 있는 독특한 물질이다. 이 특성으로 인해 메모리 소자의 programming 시에는 deep trap site에 charging이 일어나고, erasing 시에는 shallow trap site에 캐리어들이 쉽게 공급되면서 deep trap site에 갇혀있던 charge가 쉽게 de-trapped 된다는 장점을 가지고 있다. 따라서, 본 실험에서는 산화물 반도체인 ZnO를 trap layer로 하는 CTF 소자의 메모리 특성을 확인하기 위해 간단한 구조인 metal-oxide capacitor (MOSCAP)구조로 제작하여 메모리 특성을 평가하였다. 먼저, RCA cleaning 처리된 n-Si bulk 기판 위에 tunnel layer인 SiO2 5 nm를 rf sputter로 증착한 후 furnace 장비를 이용하여 forming gas annealing을 $450^{\circ}C$에서 실시하였다. 그 후 ZnO를 20 nm, SiO2를 30 nm rf sputter로 증착한 후, 상부전극을 E-beam evaporator 장비를 사용하여 Al 150 nm를 증착하였다. 제작된 소자의 신뢰성 및 내구성 평가를 위해 상온에서 retention과 endurance 측정을 진행하였다. 상온에서의 endurance 측정결과 1000 cycles에서 약 19.08%의 charge loss를 보였으며, Retention 측정결과, 10년 후 약 33.57%의 charge loss를 보여 좋은 메모리 특성을 가지는 것을 확인하였다. 본 실험 결과를 바탕으로, 차세대 메모리 시장에서 trap layer 물질로 산화물 반도체를 사용하는 CTF의 연구 및 계발, 활용가치가 높을 것으로 기대된다.

• Smart Media Journal
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• v.4 no.2
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• pp.62-67
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• 2015

During several decades, hard disk drive(HDD) has been used in most computer systems as secondary storage and, however, the performance enhancement of HDD is limited by its mechanical properties. On the other hand, although the flash memory based solid state drive (SSD) has more advantages over HDD such as high performance and low noise, SSD is still too expensive for common usage and expected to take several years to replace HDD completely. Therefore, SSD caching mechanism using the SSD as a cache of high capacity HDD has been highlighted lately. The representatives of SSD caching mechanisms are typically bcache, dm-cache, Flashcache, and EnhanceIO. Each of them has its own internal mechanism and implementation, and this makes them to show their own pros. and cons. In this paper, we analyze the characteristics of each SSD caching mechanisms and compare the performance of them under various workloads. We expect that our contribution will be useful to enhance the performance of SSD caching mechanisms.

• Journal of Advanced Marine Engineering and Technology
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• v.35 no.6
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• pp.842-848
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• 2011

A fabricated hybrid control board using multi-communication is designed with a low power 8-bit microcontroller, ATxmega128A1. The microcontroller consists of 8 UART (Universal asynchronous receiver/transmitter) ports, 2 kbytes EEPROM, 128 kbytes flash memory, 8 kbytes SRAM. The 8 URAT ports are used for a multi-communication modem, a GPS module, etc. The EEPROM is used for saving a configuration for running programs, and the flash memory of 128 kbytes is used for storing a F/W (Firm Ware), and the 8 kbytes SRAM is used for stack and for storing memory of global variables while running programs. If we use the multi-communication of CDMA, TRS and RF to remotely control Aid to Navigation, it is able to remove the communication shadow area. Even though there is a shadow area for an individual communication method, we can select an optimal communication method. The compatibility of data has been enhanced as using of same data frame per communication device. For the test, 8640 of data have been collected from each buoy during 30 days in every 5 minutes and the receiving rate of the data has shown more than 85 %.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.121-130
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• 2017

NAND flash memory has advantages of non-volatility, little power consumption and fast access time. However, it suffers from inability that does not provide to update-in-place and the erase cycle is limited. Moreover, the unit of read/write operation is a page and the unit of erase operation is a block. Therefore, erase operation is slower than other operations. The AGC, the proposed garbage collection policy focuses on not only garbage collection time reduction for real-time guarantee but also wear-leveling for a flash memory lifetime. In order to achieve above goals, we define three garbage collection operating modes: Fast Mode, Smart Mode, and Wear-leveling Mode. The proposed policy decides the garbage collection mode depending on system CPU usage rate. Fast Mode selects the dirtiest block as victim block to minimize the erase operation time. However, Smart Mode selects the victim block by reflecting the invalid page number and block erase count to minimizing the erase operation time and deviation of block erase count. Wear-leveling Mode operates similar to Smart Mode and it makes groups and relocates the pages which has the similar update time. We implemented the proposed policy and measured the performance compare with the existing policies. Simulation results show that the proposed policy performs better than Cost-benefit policy with the 55% reduction in the operation time. Also, it performs better than Greedy policy with the 87% reduction in the deviation of erase count. Most of all, the proposed policy works adaptively according to the CPU usage rate, and guarantees the real-time performance of the system.

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.23-31
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• 2011

Recently, Solid state disk is mainly used because this device has lower power consumption as well as higher response time. But it features higher price and lower performance at delete and write operations compared with HDD. To compensate this defect, Hybrid hard disk with internal non-volatile flash memory was issued. This NVCache is used as a kind of cache for disk blocks. In this paper, an I/O scheme for H-HDD is proposed for improving low power consumption as well as response time. Our method is to use this NVCache as read cache mainly and write cache when write requests are concentrated. In read cache operation, disk blocks with higher priority determined on basis of time as well as spatial localities are prefetched, which can improve response time. The write operation is conducted only at write peak time as disk spindle up costs higher battery power as well as response time. Experiments results show that the suggested method can improve response time of H-HDD and lower the power consumption.

• The Journal of Korean Institute of Next Generation Computing
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• v.14 no.5
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• pp.40-52
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• 2018

Solid state drive (SSD) cache technologies that are used as a second-tier cache between the main memory and hard disk drive (HDD) have been widely studied. The SSD cache requires a new prefetching scheme as well as cache replacement algorithms. This paper presents a prefetching scheme for a storage-class cache using SSD. This prefetching scheme is designed for the storage-class cache and based on a long-term scheduling in contrast to the short-term prefetching in the main memory. Traditional prefetching algorithms just consider only read, but the presented prefetching scheme considers both read and write. An experimental evaluation shows 2.3% to 17.8% of hit rate with a 64GB of SSD and the 4GiB of prefetching size using an I/O trace of 14 days. The proposed prefetching scheme showed significant improvement of cache hit rate and can be easily implemented in storage-class cache systems.

• Journal of Advanced Marine Engineering and Technology
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• v.37 no.4
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• pp.409-417
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• 2013

Mu-communication board supported by multi-communication is designed with Atxmega 128A1 which is a low power energy consuming of 8-bit microcontroller. ATxmega128A1 microcontroller consists of 8 UART(Universal asynchronous receiver/transmitter) ports which can be setting appropriate user interface having command line interpreter(CLI) program with each port, 2 kbytes EEPROM, 128 kbytes flash memory, 8 kbytes SRAM. 8 URAT ports are used for the multi communication modem, GPS module, etc. and EEPROM is used for saving a configuration for program running, and flash memory of 128 kbytes is used for storing a Firm Ware, and 8 kbytes SRAM is used for stack, storing memory of global variables while program running. If we uses the hybrid communication of path optimization of VHF, TRS and CDMA to remote control AtoN(aid to navigation), it is able to remove the communication shadow area. Even though there is a shadow area for individual communication method, we can select an optimum communication method. The compatibility of data has been enhanced as using of same data frame per communication devices. For the test, 8640 of data has been collected from the each buoy during 30 days in every 5 minutes and the receiving rate of the data has shown more than 99.4 %.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.143-151
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• 2013

NAND flash-based SSDs (Solid State Drive) have advantages of fast input/output performance and low power consumption so that they could be widely used as storages on tablet, desktop PC, smart-phone, and server. But, SSD has the disadvantage of wear-leveling due to increase of the number of writes. In order to improve the lifespan of the SSD, a variety of data deduplication techniques have been introduced. General fixed-size splitting method allocates fixed size of chunk without considering locality of data so that it may execute unnecessary chunking and hash key generation, and variable-size splitting method occurs excessive operation since it compares data byte-by-byte for deduplication. This paper proposes adaptive chunking method based on application locality and file name locality of written data in SSD-based server storage. The proposed method split data into 4KB or 64KB chunks adaptively according to application locality and file name locality of duplicated data so that it can reduce the overhead of chunking and hash key generation and prevent duplicated data writing. The experimental results show that the proposed method can enhance write performance, reduce power consumption and operation time compared to existing variable-size splitting method and fixed size splitting method using 4KB.

• Journal of Internet Computing and Services
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• v.16 no.5
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• pp.19-27
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• 2015

Due to the advantages of fast read/write operation and low power consumption, SSD(Solid State Drive) is now widely adopted as storage device of smart phone, laptop computer, server, etc. However, the shortcomings of SSD such as limited number of write operations and asymmetric read/write operation lead to the problem of shortened life span of SSD. Therefore, the block replacement policy of SSD used as cache for HDD is very important. The existing solutions for improving the lifespan of SSD including the LARC scheme typically employ the LRU algorithm to manage the SSD blocks, which may increase the miss rate in SSD due to the replacement of frequently used block instead of rarely used block. In this paper we propose a novel block replacement scheme which considers the block reuse interval to effectively handle various data read/write patterns. The proposed scheme replaces the block in SSD based on the recency decided by reuse interval and age along with hit ratio. Computer simulation using workload trace files reveals that the proposed scheme consistently improves the performance and lifespan of SSD by increasing the hit ratio and decreasing the number of write operations compared to the existing schemes including LARC.