• Journal of Korea Multimedia Society
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• v.13 no.8
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• pp.1221-1234
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• 2010

MANET(Mobile Ad-hoc Network)s have been researched primary at routing protocols and at the guarantees of QoS(Quality of Service) for mobile environments. Otherwise the Ubiquitous Sensor Networks (USNs) have some limitations in power energies and in processing of sensing data, as well as their network topologies are frequently changed by fading off and node failures. Thus we should redesign network protocols with concerning to energy efficiency for the USNs above all. In this paper, we focus on the protocol interface for managing for USNs based on the surveys. And then we figure the topology of USNs out and design the network protocol interface to make power saved, with data gathering and processing more efficient using our designed packet structures.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2630-2632
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• 2003

본 연구는 철도 선로변에 설치되는 LDTS(Local Data Transmission System)와 EIS(Electronic Interlocking System) 사이의 인터페이스를 위한 정보전송 프로토콜에 대한 성능검증 시뮬레이션을 위한 것으로, LDTS와 EIS사이의 링크사양, 전송 메시지 정보 및 형식, 장치간 전송 프로토콜 기준 등을 분석하여 파라미터들을 추출한 후, 이들을 ARQ, FEC, HARQ 방식들에 적용하여 처리율(Throughput) 및 여러 설계변수들에 대한 시뮬레이션 결과를 비교하였다. 시뮬레이션 프로그램은 Matlab과 Matlab GUI 툴을 이용하여 작성하여 사용자가 손쉽게 시뮬레이션 파라미터들을 조정할 수 있도록 하였고, Matlab 프로그램 완성후에는 이를 Stand-alone C++ 프로그램으로 코드변환하여 Matlab이 설치되지 않은 컴퓨터에서도 프로그램 사용이 가능하도록 하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.10
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• pp.1190-1196
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• 2016

In this paper, a cross-layer interworking scheme for different protocols is proposed to provide an efficient internet services in very small aperture terminal (VSAT) based satellite communication systems. In addition, we implement the proposed interworking model and prove the feasibility of the proposed system. VSAT based satellite communication systems commonly use digital video broadcasting (DVB)-S2 standard. Unfortunately, DVB-S2 has inefficient parts to support IP based internet services because it has originally been designed to support broadcasting services. Generic stream encapsulation (GSE) protocol, which is a layer 2 protocol, has been proposed to mitigate this inefficiency. We propose a cross-layer interworking scheme to cooperate efficiently between IP and GSE protocols and between GSE protocol and DVB-S2, respectively. In addtion, we implement the proposed interworking schemes via computer softwares and prove the feasibility using NI-USRP and commercial DVB receiver.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.8B
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• pp.646-656
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• 2008

In this paper, we design and verify the MAC chip of the two-stage AWG-based WDM-PON which considers 128 ONUs and 32 wavelengths. Each wavelength with the capacity of 1Gbps is allocated to ONU for downstream transmission but each wavelength for upstream transmission can be shared by four ONUs. Therefore, MAC protocol is required to avoid the collision and use the network resource efficiently among ONUs which are sharing the same wavelength. To design a request/permit-based MAC protocol, we define a unit-chip module called sub-MAC. The WDM-PON with 128 ONUs can be implemented by using 32 sub-MAC modules. The sub-MAC consists of one control unit, one receipt unit and four transmission units. The state transition diagram of the module is described by the internal/external control signals among the functional units. The function of the sub-MAC module is verified through logic simulation using ModelSIM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.69-78
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• 2001

This paper presents the design and FPGA implementation of a FLEX PSP(Protocol Signal Processor) for the portable high speed paging system. In this approach, two algorithms are newly proposed for implementing the PSP which provides capabilities of the maximum 6,400bps at speed, high-channel throughput, real time error correction and an effective frame search function. One is an accurate symbol synchronization algorithm which is applied for synchronizing the interleaved 4-level bit symbols which are received at input stage of A/D converter, and the other is a modified fast decoding algorithm which is provided for realizing double error correction of (31,21)BCH signal. The PSP is composed of six functional modules, and each module is modelled in VHDL(VHSIC Hardware Description Language). Both functional simulation and logic synthesis have performed for the proposed PSP through the use of Synopsys$^{TM}$ tools on a Axil-320 Workstation, and where Altera 10K libraries are used for logic synthesis. From logic synthesis, we can see that the number of gates is about 2,631. For FPGA implementation, timing simulation is performed by using Altera MAX+ PLUS II, and its results will be also given. The PSP which is implemented in 6 FPGA devices on a PCB has been verified by means of Logic Analyzer.r.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.4
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• pp.7-12
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• 2014

IETF (Internet Engineering Task Force) CoAP (Constrained Application Protocol) protocol is supported communication between sensor or actuator nodes by in a constrained environment, such as small amount of memory, and low power. CoAP and HTTP protocol can convert easily, and can use to monitor or controll the infrastructure utility through low-power sensor and actuator networks in IoT (Internet of Thing) and M2M (Machine-to-Machine) environment. IETF CoRE(Constrained RESTful environments) Working Group proposed CoAP protocol in 2010, and began to standardize it. Recently, CoAP protocol is published RFC (Request for Comments) 7252. In this paper, we design and implement of CoAP protocol for testing the interoperability in heterogeneous operating environments. For this experiment, we developed the CoAP client program based on Windows environment and CoAP server program in Linux environment to test the interoperability.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.919-920
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• 2009

액화 천연 가스 플랜트 시뮬레이터는 막대한 자본 투자가 필요한 대형 시스템 설계 및 건설 단계에서 사전에 설계 오류 검출 및 시스템 검증을 함으로써 많은 비용을 절약해줄 수 있는 중요한 시스템이다. 이 연구에서는 플랜트, 시뮬레이터, 운전원 훈련 시스템 및 제어시스템을 운전하는 과정에서 발생하는 정보를 효과적으로 처리하기 위해서 구축되는 정보 처리 시스템의 기본 설계에 관한 내용을 소개한다. 전체 시스템은 물리적 플랜트와 가상 플랜트로 나눌 수 있고 가상 플랜트는 시뮬레이터와 운전원 훈련 시스템으로 구현되며, 제어 시스템은 PLC로 구현하고 Modubus 프로토콜과 OPC 서버를 통해 데이터 처리가 가능하다. 플랜트로부터 생성되는 데이터 처리에서는 실시간 데이터 처리 속도가 중요하므로 실시간 데이터베이스를 도입하였다. 실제 플랜트 데이터와 시뮬레이터 데이터는 상호 교환이 가능하도록 구성하였다. 본 시스템 설계는 기본 설계 단계이므로 향후 LNG 플랜트에 적용하기 위해서는 상세 설계가 필요하다.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.117-128
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• 2013

u-safety service system inter-works with the diverse operation agencies, through CCTV network, such as the emergency call terminal with built-in GPS, the mobile communication network, u-safety service provider, relay system and CCTV control center. In the case of the emergency call, this service searches the location of caller in real time, and then continues to search the location of caller through the control of CCTV in the searched place, and can provide the several agencies like guardian, police office, fire station, hospitals, relief organizations and municipalities, with the diverse information necessary for the secure rescue through SMS and wired network. In this paper, a new protocol and specification for u-safety service relay system is designed and implemented. The effectiveness of presented protocol is verified by computer simulation. The designed protocol of u-safety service is applied to real 3GPP and 3GPP2 mobile communication networks to verify its performance.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10e
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• pp.415-417
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• 2002

운영체제가 지원되지 않는 소규모 기기에서 IPv6의 보안기능을 고성능으로 제공하기 위해본 연구실에서는 IPv6용 IPsec 프로토콜과 암호화 알고리즘을 하드웨어로 구현하였다. 이러한 IPv6용 하드웨어 IPsec을 기반으로 한 보안 서비스를 제공하기 위해서는 안전한 키의 교환과 인증이 중요하다. 이를 위하여 본 논문에서는 IPv6용 하드웨어 IPsec을 위한 키 교환시스템으로서 IKE Module을 설계하여 드라이버 프로그램으로 구현하였다. 그리고 구현된 IKE Module을 IPv6용 하드웨어 IPsec의 드라이버로 탑재하여 기존의 소프트웨어 IKE Module과의 테스트를 통하여 기능을 검증하였다.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04d
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• pp.286-288
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• 2003

본 논문에서는 서로 다른 네트워크간의 다양한 프로토콜과 이종의 트래픽을 동시에 처리할 수 있는 네트워크용 SoC (System-on-a-Chip) 프로세서를 구현하였다. 제작된 네트워크 SoC 프로세서는 ARM 프로세서 코어와 ATM(Asynchronous Transfer Mode) 블록, 10/100 Mbps 이더넷 볼록, 스케쥴러, UART 등을 이용하였고 각 블록은 AM8A (Advanced Microcontroller Bus Architecture) 버스로 연결하였다. SoC 프로세서는 CADENCE사의 VerilogHDL을 이용하여 설계하였고 0.35$\mu\textrm{m}$ 셀 라이브러리를 이용하여 검증하였다. 구현된 칩은 총 게이트수가 312,000개이며 칠의 최대 동작 주파수는 50MHz 이다.