• Journal of Software Assessment and Valuation
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• v.15 no.1
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• pp.109-114
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• 2019

In this paper, simulations of S-parameter and characteristic impedance for the probe pin are performed and its high-frequency performance is analyzed. The probe pins are arranged with one signal pin in the center and four ground pins on the top, bottom, left and right sides. The insertion loss and return loss of the probe pin are calculated while increasing the separation between the probe pins to 0.35 mm, 0.40 mm, and 0.50 mm, respectively. It is confirmed that the probe pin has different features of the insertion loss due to its periodic resonance phenomenon. Effect of the characteristic impedance on pitch and assignment of the probe pin is also analyzed. It is verified that there are a number of ground pins whose characteristic impedance is close to 50 Ω.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.2
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• pp.177-186
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• 2012

In this paper, we propose a design method that the crosstalk of probe connector pins satisfy the limitation of -30 dB. The parameters(inductance and capacitance) were extracted in the grid-structured probe connector pin system, and it is shown that the new parameters are easily calculated with increasing ground pin numbers using the previously calculated parameters. In addition, the crosstalk reduction algorithm by employing more grounds around the signal pin has been suggested, and it is confirmed that the suggested method is quite effective especially for the reduction of inductive couplings. Finally, we suggested the correlation between the pitch and the length of the pins to satisfy the crosstalk limitation of -30 dB with the given number of ground pins, which will be quite useful when design a probe connector pin system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.4
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• pp.1210-1215
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• 2010

The probe card are test modules which are to classify the good semiconductor chips and thin film before the packaging process. In the rapid growth a technology of semiconductor, the number of pads per unit area is increasing and pad arrays are becoming irregular. Therefore, the technology of probe card needs narrow width and lots of probe tip. In this paper, the probe tip based on the MEMS(Micro Electro Mechanical System)technology was developed a new MEMS probe tip for vertical probe card applications. For the structural designs of probe tip were performed to mechanical characteristics and structural analysis using FEM(Finite Element Method). Also, the contact force of MEMS probe tip compared with FEM results and experimental results. Finally, the MEMS probe card was developed a fine pitch smaller than $50{\mu}m$.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.199-199
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• 2012

최근 그래핀의 대면적 합성 및 롤투롤 전사 공정의 개발로 그래핀의 상용화가 가시화 되고 있다. 하지만, 그래핀의 독특한 특성인 선형적이고 밴드갭이 없는 에너지 띠 분포 때문에 반도체 소자로서의 직접적인 적용에는 한계가 있다. 이러한 문제를 해결하기 위한 돌파구로써, 그래핀 복합체의 연구와 개발이 활발히 진행되고 있으며 본 연구에서는 그래핀 복합 적층 구조를 다룬다. 이는 디스플레이, 초고속 반도체 소자, 고성능 광전자소자 및 초고감도 센서 등 다양한 분야에 대한 그래핀의 실용화 가능성이 높아진 것을 의미한다. 특히, 높은 가시광 투과도와 낮은 면저항으로 기존 투명 전극에 대표적으로 사용되고 있는 ITO (Indium Tin Oxide)를 그래핀으로 대체하는 것에 관한 연구가 활발히 진행되고 있다. 하지만 그래핀이 높은 전자이동도를 가지는 것에 비하여 비저항과 투과도 측면에 있어서는 ITO의 성능을 뛰어넘지 못하는 실정이다. 따라서 본 연구에서는 ITO가 가지는 취약점인 기판과의 약한 접착력, 높은 취성, 기판과의 열팽창률 차이 등의 공정상 문제점을 극복하고자 하였다. 그래핀 복합 적층 필름은 플라스틱 기판 (PET) 위에 열 화학기상증착법(Chemical Vapor Deposition, CVD)을 이용하여 합성한 그래핀을 전사하고, ITO 용액을 도포한 다음 다시 그래핀을 씌워 제작하여 샌드위치 구조(sandwich structure)를 형성하였다. 완성된 필름은 광학적, 전기적 특성 분석을 수행하였다. 광학적 분석으로는 라만 분광을 이용한 그래핀 품질평가와 파장대에 따른 광 투과도, 그리고 반사도 측정을 하였으며, 전기적 특성은 면저항을 측정함으로써 분석한다. 결함이 적고, 대면적에 걸쳐 한 층을 이루어야 하는 고품질 그래핀의 요구사항에 따라 라만 분광의 G, 2D, D 띠를 분석하였다. G와 2D 띠의 비율을 통해 그래핀의 층 수를, D 띠의 강도를 통해 결함의 유무를 판단하였다. 또한, 가시광 영역에서 90% 이상의 광 투과도를 보여야 하는 투명 소자의 요구사항 달성 정도를 UV-VIS를 이용하여 확인하였다. 마지막으로, 제작한 필름의 면저항 또한 4-프로브 멀티미터를 이용하여 측정하고, 일반적인 터치스크린의 면저항인 $500{\Omega}/sq$를 만족하는지 평가하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.11
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• pp.4121-4128
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• 2010

A probe card is used in testing semiconductor wafers. It must maintain a precise location tolerance for a fine pitch due to highly densified chips. However, high heat transferred from its lower chuck causes thermal deformations of the probe card. Vertical deformation due to the heat will bring contact problems to the pins in the probe card, while horizontal deformation will cause positional inaccuracies. Therefore, probe cards must be designed with proper materials and structures so that the thermal deformations are within allowable tolerances. In this paper, heat transfer analyses under realistic loading conditions are simulated using ANSYS$^{TM}$ finite element analysis program. Thermal deformations are calculated based on steady-state temperature gradients, and an optimal structure of the probe card is proposed by adjusting a set of relevant design parameters so that the deformations are minimized.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.69-74
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• 2019

The influence of measuring fixtures on the measurement of dielectric and piezoelectric properties of PMN-PT single crystal specimens was investigated. As the pressure of the jig pin which applied the AC electrical signal to the sample decreased, the lower resonance resistance was measured and the higher mechanical quality factor was calculated. The mechanical quality factor was 418 when the spring tension of the jig pin was 20grf, and the value of the quality factor was reduced by half when the spring tension was 200grf. The 4-probe fixture method is unsuitable for measuring piezoelectric properties, but it was suitable for the measurement of dielectric loss. In order to accurately evaluate the piezoelectric properties of PMN-PT, it is necessary to lower the spring tension of the jig pin as much as possible.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.5
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• pp.559-575
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• 2014

In this paper, we propose a horizontal/vertical calibration kit for calibrating a vector network analyzer(VNA) to measure the vertical connector pin. If the conventional calibration kit is used, we should change the arm for a probe or need an assistant device and it takes a long time. In addition there is a risk of precision degradation caused by the position change of the probe tip sensitive to the surroundings. We suggest a 4-port vertical calibration kit to make up for the aforementioned shortcomings. The calibration kit was manufactured for the SOLT calibration method. 'Short', 'Open', and 'Load' are available in the horizontal plane, 'Thru' is available not only in the horizontal plane on the two planes of a PCB, but in the vertical plane between the two planes according to the positions of the probes. We complemented the conventional calibration kit to make a vertical calibration kit to be used for the vertical measurement method. We compared and analysed their reflection/transfer characteristics of the SOLT calibration standards of the proposed calibration kit and conventional one, we get a ${\pm}0.1$ dB differences of transfer characteristics in the range from 300 kHz to 8.5 GHz. In order to demonstrate usefulness, and we performed a case study for horizontal and vertical cases, and compared the results of the proposed calibration kit and conventional one.

• Journal of the Semiconductor & Display Technology
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• v.23 no.1
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• pp.97-103
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• 2024

In this paper, the difference between the S-parameter and the characteristic impedance according to the structural change of the fine pitch coaxial socket was analyzed. A pitch of the probe pin was applied to 0.20mm, and ground pins of different conditions were placed on each of the five signal pins. Insertion loss and reflection loss were analyzed for the coaxial socket of normal structure and the two sockets of the proposed structure. In addition, the difference in characteristic impedance was analyzed using time domain reflectometry. Through the analysis, it was confirmed that the characteristic impedance was improved applying the new structures of the socket at the same pitch