• Journal of Internet Computing and Services
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• v.19 no.5
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• pp.67-75
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• 2018

According to Symantec's Internet Security Threat Report(2018), Internet security threats such as Cryptojackings, Ransomwares, and Mobile malwares are rapidly increasing and diversifying. It means that detection of malwares requires not only the detection accuracy but also versatility. In the past, malware detection technology focused on qualitative performance due to the problems such as encryption and obfuscation. However, nowadays, considering the diversity of malware, versatility is required in detecting various malwares. Additionally the optimization is required in terms of computing power for detecting malware. In this paper, we present Stream Order(SO)-CNN and Incremental Coordinate(IC)-CNN, which are malware detection schemes using CNN(Convolutional Neural Network) that effectively detect intelligent and diversified malwares. The proposed methods visualize each malware binary file onto a fixed sized image. The visualized malware binaries are learned through GoogLeNet to form a deep learning model. Our model detects and classifies malwares. The proposed method reveals better performance than the conventional method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.105-112
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• 2009

In this paper, we investigated abnormal ESD failure on guard-rings in the smart power IC fabricated with $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology. Initially, ESD failure occurred below 200 V in the Machine Model (MM) test due to current crowding in the parasitic diode associated with the guard-rings which are generally adopted to prevent latch-up in high voltage devices. Optical Beam Induced Resistance Charge (OBIRCH) and Scanning Electronic Microscope (SEM) were used to find the failure spot and 3-D TCAD was used to verify cause of failure. According to the simulation results, excessive current flows at the comer of the guard-ring isolated by Local Oxidation of Silicon (LOCOS) in the ESD event. Eventually, the ESD failure occurs at that comer of the guard-ring. The modified comer design of the guard-ring is proposed to resolve such ESD failure. The test chips designed by the proposed modification passed MM test over 200 V. Analyzing the test chips statistically, ESD immunity was increased over 20 % in MM mode test. In order to avoid such ESD failure, the automatic method to check the weak point in the guard-ring is also proposed by modifying the Design Rule Check (DRC) used in BCD technology. This DRC was used to check other similar products and 24 errors were found. After correcting the errors, the measured ESD level fulfilled the general industry specification such as HBM 2000 V and MM 200V.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.310-310
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• 2012

최근 전자산업의 발달에 따른 전자제품의 소형화 및 고기능화 요구에 대응하기 위하여 저항(resistor), 커패시터(capacitor), IC (integrated circuit) 등의 수동소자를 개별 칩(discrete chip) 형태로 형성하여 기판의 표면에 실장하는 기술이 일반화되고 있다. 그러나, 수동 소자의 내장 기술은 기판의 패턴 밀도의 급격한 향상과 더불어 수동소자의 내장 공간도 협소해지는 문제점이 있다. 상기의 문제점을 해결하기 위해 개별 칩 형태의 내장형 저항체를 박막 형태의 내장 저항체를 구현하는 기술의 개발이 최근 주목을 받고 있다. 박막 저항체는 기존의 권선저항 및 후막저항과 비교하여 정밀한 온도저항계수를 가지며 이동통신에 적용시 고주파 영역(GHz)에서의 안정성과 주파수 특성이 좋다는 장점들을 가지고 있다. 박막 저항 물질로는 높은 경도와 우수한 열적 안정성을 가지고 있는 TaN (tantalum nitride)이 주로 사용되고 있다. 일반적으로, TaN 박막은 스퍼터링을 사용하며 제조되며 TaN 박막의 성질은 탄탈륨과 질소의 화학정량비, 박막의 결함 정도, 또는 공정압력 및 증착 온도, 플라즈마 파워 등과 같은 공정조건 등의 변화에 민감하게 변화하므로, TaN 박막의 다양한 연구가 더 필요한 실정이다. 본 연구에서는 반응성 마크네트론 스퍼터링을 사용하여 TaN 박막을 Si 기판 위에 증착하였고 TaN 박막의 원하는 특성을 제어할 수 있도록 질소 분압과 total gas volume을 조절하여 공정을 최적화하는 연구를 진행하였다. 또한 tensile pull-off 방법을 이용하여 TaN 박막의 부착강도를 평가하였고, 온도 사이클 및 고온고습 환경에 노출된 TaN 박막들의 열화 특성들에 대하여 연구하였다.

• The Journal of the Acoustical Society of Korea
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• v.22 no.2
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• pp.104-112
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• 2003

The in-duct acoustical sources of fluid machines are often characterized by the source impedance and strength using the linear time-invariant model. However, negative resistances, which are physically unreasonable, have been found throughout various measurements of the source properties in IC-engines and compressors. In this paper, the effects of the time-varying nature of fluid machines on the source characteristics are studied analytically. For this purpose, the simple fluid machine consisting of a reciprocating piston and an exhaust is considered as representing a typical periodic, time-varying system and the equivalent circuits are analyzed. Simulated measurements using the analytic solutions show that the time-varying nature in the actual sources is one of the main causes of the negative source resistances. It is also found that, for the small magnitude of the time-varying component, the source radiates large acoustic power if the piston operates at twice the natural frequency of the static system. or integral submultiples of that rate.

• Journal of IKEEE
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• v.19 no.3
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• pp.440-446
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• 2015

This study has examined susceptibility of LNA(Low Noise Amplifier) due to Front-Door Coupling under Narrow-Band high power electromagnetic wave. M/DFR(Malfunction/Destruction Failure Rate) was measured to investigate the diagnostic of IC test. In addition, decapsulation analysis was used to understand the inside of the chip state in LNA devices. The experiments is employed as an open-ended waveguide to study the destruction effects of LNA using a 2.45 GHz Magnetron as a high power electromagnetic wave. The susceptibility level of LNA was assessed by electric field strength, and its failure modes were observed. The malfunction of LNA device has showed as the type of self-reset and power-reset. The electric field strength of malfunction threshold is 524 V/m and 1150 V/m respectively. Also, he electric field of destruction threshold is 1530 V/m. Three types of damaged LNA were observed by decapsulation analysis: component, onchipwire, and bondwire destruction. Based on these results, the susceptibility of the LNA can be applied to a database to help elucidate the effects of microwaves on electronic equipment.

• Journal of IKEEE
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• v.14 no.2
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• pp.90-97
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• 2010

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2747-2753
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• 2011

In this paper, a PWM current-mode DC-DC boost converter for mobile phone flash application has been proposed. The converter which is operated with 5 Mhz high switching frequency is capable of reducing mounting area of passive devices such as inductor and capacitor, consequently is suitable for compact mobile phones. This boost converter consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. Meanwhile, the control block consists of pulse width modulator, error amplifier, oscillator etc. Proposed boost converter has been designed and verified in a $0.5\;{\mu}m$ 1-poly 2-metal CMOS process technology. Simulation results show that the output voltage is 4.26 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 Khz driven converter when the duty ratio is 0.15.