• Proceedings of the Korea Information Processing Society Conference
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• 2013.05a
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• pp.24-26
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• 2013

Undefined Instruction 하드웨어 Trojan 은 정의되지 않은 명령어가 명령어 버스를 통해 CPU 에 유입될 경우 발현되어 CPU 의 전반적인 기능을 마비시킬 수 있는 하드웨어 Trojan 이다. 일반적으로 대부분의 상용화된 CPU 는 Undefined Instruction 에 대한 예외 처리를 지원하는데, ARM 의 경우 파이프 라인의 실행 단계에서 Undefined Instruction 임을 판별한다. 본 연구에서는 파이프 라인의 명령어 추출단계에서 발현되어서 명령어 해독단계에는 다른 명령어를 전달 시킴으로써 Undefined Instruction 예외처리를 피할 수 있는 하드웨어 Trojan 을 설계하고, 이를 방지하는 대응책을 제안한다.

• Proceedings of the Korean Society of Computer Information Conference
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• 2020.07a
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• pp.1-2
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• 2020

비디오 서비스들이 등장함에 따라, 이를 위한 데이터 센터의 수요도 증가하였다. 이러한 데이터 센터의 서버들은 서로 다른 주변 온도를 보이는데, 높은 주변 온도는 높은 CPU 온도를 유도한다. 높은 CPU 온도를 낮추기 위해 CPU의 전압 및 주파수를 낮추는 온도 조절 정책이 수행되어 서버의 성능을 저하시킨다. 특히, 서로 다른 사양의 이기종 서버들에서는 주변 온도에 영향으로 인해 서버들의 성능이 역전될 수도 있다. 본 논문에서는 이기종 서버들에서 서로 다른 주변 온도가 서버의 성능에 미치는 영향을 중심으로 비디오 트랜스코딩 성능을 비교 분석한다.

• Journal of the Korea Computer Industry Society
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• v.2 no.9
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• pp.1239-1244
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• 2001

The Virtual Interface Architecture (VIA) is usually suggested as a new standard high-performance communication of the cluster systems. However the VIA specification aims for platform independence, the current Intel VI Provider Library (VIPL) design favors systems with Intel architecture processors running the Windows operating system (OS). This paper aims for clarifying the guesstion problem of VIA and VIPL in the newtrul time of CPU Architecture and OS further more, It suggests the solution aiming the communication in the other CPU or OS

• Proceedings of the SAREK Conference
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• 2007.11a
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• pp.258-263
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• 2007

The performance of louver-finned flat-tube radiators for computer CPU liquid cooling were experimentally investigated. In this study, 5 samples of louver-finned flat-tube radiators with different width size (19mm, 24mm), tube hole (1, 9) and pass number (1, 2, 5) were tested in a wind tunnel. The experiments were conducted under the different air velocity ranging from 1 to 5 m/s. The water flow rate through a pass was 1.7 LPM. Inlet temperatures of air and water were $20^{\circ}C$ and $30^{\circ}C$ respectively. The results showed that the best performance in the 24mm sample considering pressure drop and heat transfer coefficient.

• Journal of Korea Multimedia Society
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• v.14 no.3
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• pp.449-461
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• 2011

In the field of computer science, operating system concept is taught in university, but we now teach it in the middle and/or high school. Computer is also taught not only in college but also in middle and high school. If we look up the education of computer that is trained in school, basic principles or core techniques of computer science is educated only with its theory. If the theoretical education of computer science is just trained, sometimes students are not interested in it because of lack of shortage of mass media. Therefore, we could say that it is important that the computer education features a diverse range of media, including prints, paintings, sculpture, digital photographs, mixed media, and a simulation program. For all this reason, we design and implement a program for simulation with computer operating systems especially, CPU scheduling. There are many CPU scheduling algorithms we suggest to make students understand scheduling with some different examples in practical use. In this paper, we practically propose a new approach to be used with a study tool to make a motivation for students. We design a simulation program for teaching computer operation systems to show CPU scheduling and we implement a program to make use of comparison of FCFS, SJFS, PS, and RR scheduling algorithms. With our simulation program we present a comparative analysis between scheduling algorithms could be possible.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.04a
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• pp.165-167
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• 2011

Xen과 같은 가상 머신에서 각 게스트 운영체제가 필요로 하는 CPU 요구량을 정확하게 측정하기는 어렵다. SEDF 스케줄러는 사용자가 각 게스트 운영체제의 CPU 할당량을 직접 입력하고 있다. 따라서 가변적인 부하를 가지고 있는 상황에서 게스트 운영체제의 스케줄링이 어렵다. 본 논문에서는 작업량이 가변적으로 변화하는 시스템의 QoS를 고려하여 실시간 태스크가 필요로 하는 CPU 자원을 효율적으로 할당하는 방법을 제안하였다. 실험을 통하여 제안한 방식이 가변적인 작업량에 대해서 효율적으로 동작됨을 보였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.04a
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• pp.250-253
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• 2011

Chip manufacture nowadays turned their attention from accelerating uniprocessors to integrating multiple cores on a chip. Moreover desktop graphic hardware is now starting to support general purpose computation. Desktop users are able to use multi-core CPU and GPU as a high performance computing resources these days. However exploiting parallel computing resources are still challenging because of lack of higher programming abstraction for parallel programming. The 2-dimensional discrete cosine transform (2D-DCT) algorithms are most computational intensive part of JPEG encoding. There are many fast 2D-DCT algorithms already studied. We implemented several algorithms and estimated its runtime on multi-core CPU and GPU environments. Experiments show that data parallelism can be fully exploited on CPU and GPU architecture. We expect parallelized DCT bring performance benefit towards its applications such as JPEG and MPEG.

• Proceedings of the Korea Information Processing Society Conference
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• 2023.11a
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• pp.93-96
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• 2023

머신 러닝의 수요가 증가함에 따라, 머신 러닝 워크플로우의 배포 수요도 증가했다. Kubeflow를 통해 머신 러닝 배포를 편리하게 할 수 있으며, Kubeflow Pipelines에서는 하나의 작업을 여러 컨테이너로 분산시켜서 연산하는 것이 가능하다. 하지만 컨테이너 수를 많이 늘릴수록 반드시 성능이 향상되는 것은 아니다. 따라서, 본 연구에서는 성능 향상의 한계를 제공하는 원인을 분석하기 위해서, Kubeflow에서 CPU 집약적인 작업을 여러 컨테이너로 분산시켜서 연산을 수행하였다. 컨테이너 수에 따른 연산 완료 시간을 비교 및 분석한 결과, 컨테이너 수가 증가할수록 연산 속도 향상이 빨라지나, 어느 시점을 지나면 속도가 다시 완만하게 줄어드는 현상을 확인하였다. 이는 리소스 제한으로 인해 모든 컨테이너가 동시에 스케줄링 되지 못한 것이 가장 큰 원인으로 분석하였다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.6
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• pp.71-76
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• 2021

Recently, as the size of IoT data grows, the memory power consumption of real-time systems increases rapidly. This is because real-time systems always place entire tasks in memory, which increases the demand of DRAM significantly. In this paper, we adopt emerging fast storage media and move a certain portion of real-time tasks from DRAM to storage. The part of tasks in storage are, then, loaded into memory when they are actually used. We incorporate our memory/storage power-saving into the dynamic voltage/frequency scaling of processors, thereby optimizing power consumptions in CPU and memory simultaneously. Specifically, the proposed technique aims at minimizing the CPU idle time and the DRAM memory size by determining appropriate voltage modes of CPU and the swap ratio of memory, without violating the deadlines of all tasks. Through simulation experiments, we show that the proposed technique significantly reduces the power consumption of real-time systems.

• Database Research
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• v.34 no.3
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• pp.28-44
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• 2018

In a database system, the most expensive operation among relational operations is a join operation. Generally, CPU-based join operations uses parallel processing with either 1 core or 16 cores at most, which does not significantly improve the function. On the other hand, GPGPU(General-Purpose computing on Graphics Processing Units) allows parallel processing through thousands of processing units, greatly reducing the time required to perform join operations. Parallelization of the operation using GPGPU uses NVIDIA's CUDA SDK. In this paper, we implement parallelization of the join operation using GPGPU and compare the performances. The used join operations are Nested Loop Join (NLJ), Sort Merge Join (SMJ) and Hash Join (HJ), and GPGPU equipment uses TITAN Xp, GTX 1080 Ti and GTX 1080. We measure and compare the performance of join operations based on CPU and GPGPU. We compare this performance with the performance of the previous study on the join operation based on GPGPU. The results of experiment show that the performance based on GPGPU is 6~328 times faster than the one based on CPU.