• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.75-80
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• 2019

Silicon solar cells have been widely used as a most promising renewable energy source due to eco-friendliness and high efficiency. As modules of silicon solar cells are connected in series for a practical electricity generation, a large voltage of 500-1,500 V is applied to the modules inevitably. Potential-induced degradation (PID), a deterioration of the efficiency and maximum power output by the continuously applied high voltage between the module frames and solar cells, has been regarded as the major cause that reduces the lifetime of silicon solar cells. In particular, the migration of the $Na^+$ ions from the front glass into Si through the anti-reflection coating and the accumulation of $Na^+$ ions at stacking faults inside Si have been reported as the reason of PID. In this research, the thickness effect of $SiO_x$ layer that can block the migration of $Na^+$ ions on the reduction of PID is investigated as it is incorporated between anti-reflection coating and p-n junction in p-type PERC solar cells. From the measurement of shunt resistance, efficiency, and maximum power output after the continuous application of 1,000 V for 96 hours, it is revealed that the thickness of $SiO_x$ layer should be larger than 7-8 nm to reduce PID effectively.