• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.1
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• pp.1-8
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• 2004

The INS(Inertial Navigation System) provides high rate position, velocity and attitude data with good short-term stability while the GPS(Global Position System) provides position and velocity data with long-term stability. By integrating the INS with GPS, a navigation system can be achieved to Provide highly accurate navigation Performance. For the best performance, time synchronization of GPS and INS data is very important in GPS/INS integrated system But, it is impossible to synchronize them exactly due to the communication and computation time-delay. In this paper, to reduce the error caused by the measurement time-delay in GPS/INS integrated systems, error compensation methods using separate bias Kalman filter are suggested for both the loosely-coupled and the tightly-coupled GPS/INS integration systems. Linearized error models for the position and velocity matching GPS/INS integrated systems are Int derived by linearizing with respect to its time-delay and augmenting the delay-state into the conventional state equations for each case. And then separate bias Kalman Inter is introduced to estimate the time-delay during only initial navigation stage. The simulation results show that the present method is effective enough resulting in considerably less position error.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.3
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• pp.142-148
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• 2008

Though a deblocking filter of H.264/AVC provides enhanced image quality by removing blocking artifact on block boundary, the complex filtering operation on this process is a dominant factor of the whole decoding time. In this paper, we designed an ASIP to accelerate deblocking filter operation with the proposed instruction set. We designed a processor based on a MIPS structure with LISA, simulated a deblocking later model, and compared the execution time on the proposed instruction set. In addition, we generated HDL model of the processor through CoWare's Processor Designer and synthesized with TSMC 0.25um CMOS cell library by Synopsys Design Compiler. As the result of the synthesis, the area and delay time increased 7.5% and 3.2%, respectively. However, due to the proposed instruction set, total execution performance is improved by 18.18% on average.

• The Journal of the Acoustical Society of Korea
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• v.38 no.6
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• pp.630-636
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• 2019

Passive Ranging Sonar (PRS) is a type of passive sonar consisting of three sub-array on the port and starboard, and has a characteristic of detecting a target and calculating a bearing and a distance. The bearing and distance calculation requires physical sub-array position information, and the bearing and distance accuracy performance are deteriorated when the position information of the sub-array is inaccurate. In particular, it has a greater impact on distance accuracy performance using plus value of two time-delay than a bearing using average value of two time-delay. In order to improve this, a study on sub-array position error estimation and error compensation is needed. In this paper, We estimate the sub-array position error based on enetic algorithm, an optimization search technique, and propose a method to improve the performance of distance accuracy by compensating the time delay error caused by the position error. In addition, we will verify the proposed algorithm and its performance using the sea-going data.

• The Journal of the Korea Contents Association
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• v.6 no.6
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• pp.1-8
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• 2006

This paper presents an intelligent pattern matching method that can be used to acquire the reliable calibration data for automatic PCB pattern inspection. The inaccurate calibration data is often acquired by geometric pattern variations and selecting an inappropriate model manual. It makes low the confidence of inspection and also the inspection processing time has been delayed. In this paper, the geometric features of PCB patterns are utilized to calculate the accurate calibration data. An appropriate model is selected automatically based on the geometric features, and then the calibration data to be invariant to the geometric variations(translation, rotation, scaling) is calculated. The method can save the inspection time unnecessary by eliminating the need for manual model selection. As the result, it makes a fast, accurate and reliable inspection of PCB patterns.

• Proceedings of the Korean Radioactive Waste Society Conference
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• 2004.06a
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• pp.137-146
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• 2004

Laser Induced Breakdown Spectroscopy(LIBS) system is being developed as an in-situ analysis system for the radioactive waste glass in the cold crucible melter. In order to complete the LIBS system, a spectrometer, a detector, and a laser were structured. An ESA 3000 (LLA Instruments GmbH, Germany) including a calibrated Kodak KAF-1001 CCD detector was selected as the spectrometer. A Q-switched Nd-YAG Brilliant(Quantel, France) laser was selected as an energy source. As the first research stage, the excitation temperatures of Fe(I) as a function of the detector's delay intervals(500, 1000, 1500, 2000ns) were evaluated using the Einstein-Boltzmann equation. The optimized excitation temperature of Fe (I) was 7820k at the delay time of 1500㎱ using the 532nm Nd-YAG laser pulse. This LIBS system will be optimized under the real environment vitrification facility in the near future and then used to be in-situ analyzed the glass compositions in the melter qualitatively.

• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2042-2049
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• 1999

In contrast to traditional data communication, the multimedia communication must support variable requirements to multimedia application service. Specially, it is a critical issue that the synchronization supports a continuous and temporal relationship media playout in a distributed environment. But the continuously generated media in source can't guarantee the constant interval on playout for the destination due to the inconsistent network transmission delay and transmission error. In this paper, we introduce a intramedia synchronization mechanism for the continuous and synchronous playout of multimedia stream such as audio and video across a communication network. The proposed mechanism is based on the user defined QoS(Quality of Service) and the playout correction algorithm to guarantee the continuous media playout at the receiver.

• Journal of IKEEE
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• v.23 no.4
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• pp.1257-1264
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• 2019

A 3-GSymbol/s/lane transceiver, which supports the mobile industry processor interface (MIPI) C-physical layer (PHY) specification version 1.1, is proposed. It performs channel mismatch correction to improve the signal integrity that is deteriorated by using three-level signals over three channels. The proposed channel mismatch correction is performed by detecting channel mismatches in the receiver and adjusting the delay times of the transmission data in the transmitter according to the detection result. The channel mismatch detection in the receiver is performed by comparing the phases of the received signals with respect to the pre-determined data pattern transmitted from the transmitter. The proposed MIPI C-PHY receiver is designed using a 65 nm complementary metal-oxide-semiconductor (CMOS) process with 1.2 V supply voltage. The area and power consumption of each transceiver lane are 0.136 ㎟ and 17.4 mW/GSymbol/s, respectively. The proposed channel mismatch correction reduces the time jitter of 88.6 ps caused by the channel mismatch to 34.9 ps.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.6
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• pp.32-38
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• 2003

An excess-3 code adde $r_tracter circuit is proposed for human friendly decimal computation. Carry lookahead (CLA) circuitry can be used to enhance decimal computation speed. The proposed excess-3 adde $r_tracter employs improved CLA and compensation circuitry recoding computation delay. The circuitry used for addition is used for subtraction without further modification. Substantial speed improvement is obtained compared to conventional designs.signs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.3
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• pp.44-44
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• 2001

본 논문에서는 CMOS로 구현된 3.3V 8-bit 200MSPS의 Folding / Interpolation 구조의 A/D 변환기를 제안한다. 회로에 사용된 구조는 FR(Folding Rate)이 8, NFB(Number of Folding Block)가 4, Interpolation rate 이 8이며, 분산 Track and Hold 구조를 회로를 사용하여 Sampling시 입력주파수를 Hold하여 높은 SNDR을 얻을 수 있었다. 고속동작과 저 전력 기능을 위하여 향상된 래치와 디지털 Encoder를 제안하였고 지연시간 보정을 위한 회로도 제안하였다. 제안된 ADC는 0.35㎛, 2-Poly, 3-Metal, n-well CMOS 공정을 사용하여 제작되었으며, 유효 칩 면적은 1070㎛×650㎛ 이고, 3.3V전압에서 230mW의 전력소모를 나타내었다. 입력 주파수 10MHz, 샘플링 주파수 200MHz에서의 INL과 DNL은 ±1LSB 이내로 측정되었으며, SNDR은 43㏈로 측정되었다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.6
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• pp.29-35
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• 2013

The heterogeneous emergency communication radios is used at disaster management agencies of Korea to response activity in the event of disaster. The compensation method by communication connection time difference is necessary to seamless voice communication because radios have different communication method and delay. In this paper, we suggested solution for voice transmission chance and data loss problem.