• Journal of Korean Public Health Nursing
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• v.35 no.3
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• pp.448-468
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• 2021

Objectives: This study aimed to understand the trends and issues of health-related intervention research using Intervention Mapping over the last ten years in South Korea. Intervention Mapping is a representative planning protocol to develop theory-and-evidence-based health promotion programs. Methods: The scoping review method was undertaken, and a total of 20 studies were analyzed using Intervention Mapping six steps. Results: The Korean health-related intervention studies using Intervention Mapping showed low methodological quality. In step 1, only 7 out of 20 studies organized a planning group consisting of various stakeholders. In step 2, about half of the studies did not present a matrix, which is the core essential component of Intervention Mapping. In step 5, only 1 out of 20 studies presented program adopters and maintainers. In step 6, most studies described effect evaluation relatively, but only one study mentioned process evaluation. Conclusions: In order to develop sustainable and cost-effective programs, systematic planning using Intervention Mapping is required from the research planning stage. In addition, a concrete and realistic plan needs to be established for the development of programs and adoption, dissemination and maintenance of programs.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.1
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• pp.68-75
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• 2011

The performance of peripheral devices is improving rapidly to meet the needs of users for multimedia data. Therefore, the peripheral interface with wide bandwidth and high transmission rate becomes necessary to handle large amounts of data in real time for multiple high-performance devices. PCI Express is a fast serial interface with the use of packets that are compatible with previous PCI and PCI-X. In this paper, we design and verify general peripheral interface using serial link. It includes two kinds of traffic class (TC) labels which are mapped to virtual channels (VC). The design adopts TC/VC mapping and the scheme of arbitration by priority. The design uses a packet which can be transmitted through up to four transmission lanes. The design of general peripheral interface is described in Verilog HDL and verified using ModelSim. For FPGA verification, Xilinx ISE and SPARTAN XC3S400 are used.We used Synopsys Design Compiler as a synthesis tool and the used library was MagnaChip 0.35um technology.