• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.10 no.1
• /
• pp.57-65
• /
• 2017

This paper presented a method of designing low-power feedback active noise control filter optimized for headphones/earphones. Using constrained optimization, we obtained a high order FIR noise control filter to ensure reasonable noise attenuation performance at high sampling frequency environment. Then using infinite impulse response (IIR) approximation method called Balanced Model Truncation (BMT), we obtained a low order IIR noise control filter suitable for low-power digital signal processing system like headphones/earphones. For further performance improvement, we utilized frequency warping method so that we could obtain more accurately approximated IIR filter and we ensured system stability by reconstructing the low order IIR filter in form of cascaded second order IIR filters. ANC simulation with white noise and stability test verified that the proposed algorithm had superior attenuation performance and better robustness compared to the conventional algorithm.

• The Journal of the Acoustical Society of Korea
• /
• v.33 no.3
• /
• pp.163-173
• /
• 2014

Sound propagation algorithm for a sonar simulator is required to run in real-time and should be able to model the range and depth dependence of the Korean ocean environments. Ray model satisfies these requirements and we developed an algorithm for range-dependent ocean environments. In this algorithm, we considered depth-dependence of sound speed through rays based on a rectangular cell method and layer method. Range-dependence of sound speed was implemented based on a split-step method in the range direction. Eigen-ray is calculated through an interpolation of ray bundles and Gaussian interpolation function was used. The received time signal of sonar was simulated by Fourier transform of eigen-ray solution in the frequency domain. Finally, for the verification of proposed algorithm, we compared the results of transmission loss with other validated models such as BELLHOP, SNUPE, KRAKEN and OASES, for the Pekeris waveguide, wedge, and deep ocean environments. As a result, we obtained satisfactory agreements among them.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.9
• /
• pp.73-84
• /
• 2004

This paper suggests a new scalar multiplication algerian to resist SPA which threatens the security of cryptographic primitive on the hardware recently, and discusses how to apply this algerian Our algorithm is better than other SPA countermeasure algorithms aspect to computational efficiency. Since known SPA countermeasure algorithms have dependency of computation. these are difficult to construct parallel architecture efficiently. To solve this problem our algorithm removes dependency and computes a multiplication and a squaring during inversion with parallel architecture in order to minimize loss of performance. We implement hardware logic with VHDL(VHSIC Hardware Description Language) to verify performance. Synthesis tool is Synplify Pro 7.0 and target chip is Xillinx VirtexE XCV2000EFGl156. Total equivalent gate is 60,508 and maximum frequency is 30Mhz. Our scalar multiplier can be applied to digital signature, encryption and decryption, key exchange, etc. It is applied to a embedded-micom it protects SPA and provides efficient computation.

• Journal of KIISE:Computer Systems and Theory
• /
• v.28 no.6
• /
• pp.301-309
• /
• 2001

본 논문에서는 RSA 암호 시스템의 핵심 과정인 모듈로 멱승 연산에 대한 새로운 하드웨어 구조를 제시한다. 본 방식은 몽고메리 곱셈 알고리즘을 사용하였으며 기존의 방법들이 데이터 종속 그래프(DG : Dependence Graph)를 수직으로 매핑한 것과는 달리 여기서는 수평으로 매핑하여 1차원 선형 어레이구조를 구성하였다. 그 결과로 멱승시에 중간 결과값이 순차적으로 나와서 바로 다음 곱셈을 위한 입력으로 들어갈 수 있기 때문에 100%의 처리율(throughput)을 이룰 수 있고, 수직 매핑 방식에 비해 절반의 클럭 횟수로 연산을 해낼 수 있으며 컨트롤 또한 단순해지는 장점을 가진다. 각 PE(Processing Element)는 2개의 전가산기와 3개의 멀티플렉서로 이루어져 있고, 암호키의 비트수를 k비트라 할 때 k+3개의 PE만으로 파이프라인구조를 구현하였다. 1024비트 RSA데이터의 암호 똔느 복호를 완료하는데 2k$^2$+12k+19의 클럭 수가 소요되며 클럭 주파수 100Mhz에서 약 50kbps의 성능을 보인다. 또한, 제안된 하드웨어는 내부 계산 구조의 지역성(locality), 규칙성(regularity) 및 모듈성(modularity) 등으로 인해 실시간 고속 처리를 위한 VLSI 구현에 적합하다.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.47 no.4
• /
• pp.38-42
• /
• 2010

In this paper, a design method of the compact narrow band filter on the microstrip board is proposed using slot-type split spiral resonators. The design technique of this filter is based on cascading filter stages consisting of the combination of slot-type split spiral resonators, capacitive gaps between patches, and inductive grounded stubs with the meander configuration. By these means, it was possible to get the nearly symmetric frequency responses, adjustable bandwidths, compact sizes. And also excellent characteristic of the out-of-band rejection is achieved in contrast to the conventional filter design technique. The measured insertion loss shows good results about -3.47dB at the center frequency($f_0$=1GHz) and passband return loss is less than -12.62dB. The 3dB fractional bandwidth(FBW) is approximately 7.3%. The results of the frequency response measured on the fabricated band pass filter substrate show satisfactory agreement with the simulated frequency responses by the MWS(Microwave Studio) of CST in the region of interest.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.11A
• /
• pp.918-923
• /
• 2009

In this paper, a design method of the compact narrow band filter on the microstrip board is proposed using complementary split-ring resonators(CSRRs). The design technique of this filter is based on cascading filter stages consisting of the combination of circular CSRRs, capacitive gaps between patches, and inductive grounded stubs with the meander configuration. By these means, it was possible to get the nearly symmetric frequency responses, adjustable bandwidths, compact sizes. And also excellent characteristic of the out-of-band rejection is achieved in contrast to the conventional filter design technique. The measured insertion shows good results about -4.0dB at the center frequency($f_0=1GHz$) and passband return loss is less than -9.4dB. The 3dB fractional bandwidth(FBW) is approximately 4%. The results of the frequency response measured on the fabricated band pass filter substrate show satisfactory agreement with the simulated frequency responses by the HFSS in the region of interest.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.11
• /
• pp.1507-1514
• /
• 2016

Full-image guided filter reflects all pixels of image in filtering by using weight propagation and two-pass model, whereas the existing guide filter is processed based on the kernel window. Therefore the computational complexity can be improved while maintaining characteristics of guide filter, such as edge-preserving, smoothing, and so on. In this paper, we propose an efficient VLSI architecture for the full-image guided filter by analyzing the data dependency, the data frequency and the PSNR analysis of the image in order to achieve enough speed for various applications such as stereo vision, real-time systems, etc. In addition, the proposed efficient scheduling enables the realtime process by minimizing the idle period in weight computation. The proposed VLSI architecture shows 214MHz of maximum operating frequency (image size: 384*288, 965 fps) and 76K of gates (internal memory excluded).

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.3A
• /
• pp.237-246
• /
• 2007

Clock Synchronization is one of the most basic factors to be considered when we implement an indoor synchronization network for indoor positioning. In this paper, we present a new synchronization algorithm which does not employ time stamps in order to reduce the hardware complexity and data overhead. In addition to that, we describe an algorithm that is designed to compensate the frequency drift giving an serious impact on the synchronization performance. The performance evaluation of the proposed algorithm is achieved by investigating MTIE (Maximum Time Interval Error) values through simulations. In the simulations, the frequency drift values of the practical oscillators are used. From the simulation results, it is investigated that we can achieve the synchronization performance under 10 ns when we use 1 second synchronization interval with 1 ns resolution and TCXOs (Tmperature Compensated Cristal Oscillators) both in the master clock and the slave clock.

• 한국HCI학회:학술대회논문집
• /
• 2007.02a
• /
• pp.143-149
• /
• 2007

영상은 동적인 시각 이미지와 청각의 결합에 의해 감성적인 반응을 유도한다. 다양한 영상 기법을 통하여 감성적 반응의 극대화를 추구하는 영화는 영상의 시청각적 요소들을 감성의 관점에서 효과적으로 설계하는데 본보기가 된다. 그러나, 제품의 설계속성들에 대한 감성적 평가결과를 모형화하는 감성공학적 관점에서 볼 때 영화는 시청각적 자극의 수준이 극히 다양하고 동적인 경험재로 모형화의 어려움이 있다. 본 연구에서는 영화의 감성 모형을 구축하기 위한 사전연구의 단계로 영화에서의 시청각적 요인들을 문헌조사를 통해 수집, 정리, 선별하고 이러한 시청각적 요인들 중에 영화를 관람하는 관객의 감성적, 인지적 반응에 영향을 주는 유효한 요인들을 객관적이고 체계적으로 탐색하고자 하였다. 이를 위해, 감성 및 인지적 반응의 변화를 생체신호를 통해 측정하는 한편, 생체신호의 측정 시 사용된 영화의 시청각적 자극요인을 Video/Audio Processing방법에 의해 연속적인 수치로 정량화하였다. 생체신호와 정량화된 시청각적 자극요인을 동기화하고 통계적으로 분석함으로써, 생체신호의 반응과 시청각적 자극요인과의 인과관계를 통계적으로 신뢰성있는 수준에서 검증하고자 하였다. 생체신호를 종속변수로, 시청각적 자극요인을 독립변수로 하는 896개의 부분선형회귀모형(Partial Linear Regression Model)들 중 통계적으로 유의한 선형관계에 있는 경우의 빈도분석에 의하면, 시각적 요인들 중에는 밝기(Brightness), 대비(Contrast), 색상(Color), 움직임(Motion), 장면전환속도(Shot change Rate), 주요대상의 상대적 크기가, 청각적 요인들 중에는 Peak주파수, Peak주파수의 음량, 평균음량, 소음비(Sound-to-Noise Ratio)가 생체신호의 변화에 통계적으로 유의한 영향을 주는 것으로 나타났다. 이는, 위의 시청각적 자극 요인들은 특히 관객의 감성 및 인지적인 반응에 유의한 영향을 주는 요소로 작용할 수 있음을 시사하고 있다. 이를 토대로, 위의 시청각적 자극 요인들이 가지는 다양한 조합들을 설명변수로 하는 통계적인 영화의 감성 모형을 구축할 수 있을 것으로 기대한다.

• Journal of the Computational Structural Engineering Institute of Korea
• /
• v.13 no.2
• /
• pp.231-244
• /
• 2000

This paper presents a dynamic analysis technique for a 2-D soil-structure interaction problem in the frequency domain, which can directly be applied as an analysis tool for seismic response analyses of underground structures, tunnels, embankments, and so on. In this method, the structure and near-field soil is modeled by the standard finite elements, while the unbounded far-field soil is represented using the dynamic infinite elements in the frequency domain. The earthquake-input motion is regarded as traveling P and SV waves which are incident vertically from the far-field of underlying half-space to the near-field of layered medium. The equivalent earthquake forces are then calculated utilizing so-called fixed-exterior-boundary-method and the free-field responses including displacements and tractions. For the verification of the present study, seismic response analyses are carried out for a multi-layered half-space free-field soil medium and a cylindrical cavity embedded in a homogeneous half-space. Comparisons of the present results with solutions by other approaches indicate that the proposed methodology gives accurate estimates. Finally, an application example of seismic response analysis for a subway station is presented, which demonstrates the applicability of the present study.