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The Design of Single Phase PFC using a DSP (DSP를 이용한 단상 PFC의 설계)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.6
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    • pp.57-65
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    • 2007
  • This paper presents the design of single phase PFC(Power Factor Correction) using a DSP(TMS320F2812). In order to realize the proposed boost PFC converter in average current mode control, the DSP requires the A/D sampling values for a line input voltage, a inductor current, and the output voltage of the converter. Because of a FET switching noise, these sampling values contain a high frequency noise and switching ripple. The solution of A/D sampling keeps away from the switching point. Because the PWM duty is changed from 5% to 95%, we can#t decide a fixed sampling time. In this paper, the three A/D converters of the DSP are started using the prediction algorithm for the FET ON/OFF time at every sampling cycle(40 KHz). Implemented A/D sampling algorithm with only one timer of the DSP is very simple and gives the autostart of these A/D converters. From the experimental result, it was shown that the power factor was about 0.99 at wide input voltage, and the output ripple voltage was smaller than 5 Vpp at 80 Vdc output. Finally the parameters and gains of PI controllers are controlled by serial communication with Windows Xp based PC. Also it was shown that the implemented PFC converter can achieve the feasibility and the usefulness.

Study on the Anti-oxidant and Anti-inflammatory Activities of Sarcocarp and Calyx of Persimmon (Cheongdo Bansi) (청도 반시의 과육과 감꼭지(시체: 枾滯)의 항산화 및 항염증 활성 연구)

  • Kim, Hui-Jeong;Park, Tae-Soon;Jung, Mi-Song;Son, Jun-Ho
    • Journal of Applied Biological Chemistry
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    • v.54 no.2
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    • pp.71-78
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    • 2011
  • Biological activities of sarcocarp and calyx of persimmon (Cheongdo Bansi) were investigated. The electron donating ability of the calyx extract was 91% at a 500 μg/mL level, which was higher than that of the sarcocarp extract (40%). The superoxide dismutase (SOD)-like activity of calyx extracts was about 22% at a 1,000 μg/mL level. During the entire experimental period, there was no cytotoxicity found from sarcocarp and calyx up to 50 μg/mL. Our results indicated that sarcocarp and calyx significantly inhibited NO production and iNOS and COX-2 expression accompanied by an attenuation of interleukin (IL)-1β, IL-6, and tumer necrosis factor (TNF)-α formation in human keratinocyte. These results suggest that sarcocarp and calyx of persimmon may have significant effect on inflammatory factors and can be used as potential anti-inflammatory agents.

Characteristic of PECVD-WNx Thin Films Deposited on Si3N4 Substrate (Si3N4 기판 위에 PECVD 법으로 형성한 Tungsten Nitride 박막의 특성)

  • Bae, Seong-Chan;Park, Byung-Nam;Son, Seung-Hyun;Lee, Jong-Hyun;Choi, Sie-Young
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.7
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    • pp.17-25
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    • 1999
  • Tungsten nitride(WNx) films were deposited by PECVD method on silicon nitride(WSi3N4) substrate. The characteristics of WNx film were investigated with changing various processing parameters ; substrate temperature, gas flow rate, rf power, and different nitrogen sources. The nitrogen composition in WNx film varied from 0 to 45% according to the NH3 and N2 flow rate. The highest deposition rate of 160 nm/min was obtained for the NH3 gas and relatively low deposition rate of WNx films were formed by N2 gas. WNx films deposited on WSi3N4 substrate had higher deposition rate than that of TiN and Si substrates. The purity of WNx film were analyzed by AES and higher purity WNx films were deposited using NH3 gas. The XRD analysis indicates a phase transition from polycrystalline tungsten(W) to amorphous tungsten nitride(WNx), showing improved etching profile of WNx films Thick WNx films were deposited on various substrates such as Tin, NiCr and Al and maximum thickness of 1.6μm was obtained on the Al adhesion layer.

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Design of a 2.5V 300MHz 80dB CMOS VGA Using a New Variable Degeneration Resistor (새로운 가변 Degeneration 저항을 사용한 2.5V 300MHz 80dB CMOS VGA 설계)

  • 권덕기;문요섭;김거성;박종태;유종근
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.673-684
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    • 2003
  • A degenerated differential pair has been widely used as a standard topology for digitally programmable CMOS VGAs. A variable degeneration resistor has been implemented using a resistor string or R-2R ladder with MOSFET switches. However, in the VGAs using these conventional methods, low-voltage and high-speed operation is very hard to achieve due to the dc voltage drop over the degeneration resistor. To overcome this problem a new variable degeneration resistor is proposed where the dc voltage drop is almost removed. Using the proposed gain control scheme, a low-voltage and high-speed CMOS VGA is designed. HSPICE simulation results using a 0.25{\mu}{\textrm}{m} CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than l.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190{\mu}{\textrm}{m}×360{\mu}{\textrm}{m}.

A Study on the Design and Fabrication of Phase Locked Dielectric Resonance Oscillator (위상고정 유전체 공진형 발진기의 설계 및 제작에 관한 연구)

  • Seo Gon;Park hang-Hyun;Kim Jang-Gu;Choi Byung-Ha
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.3 s.333
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    • pp.25-32
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    • 2005
  • In this papers, we first, therefore, designed VCO(voltage controlled oscillator) that is composed of the dielectric resonator and the varactor diode, and then designed and fabricated PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The measured results of the fabricated PLDRO at 12.05 [GHz] show the output power is 13.54 [dBm], frequency tuning range approximately +/- 7.5 [MHz], and Power variation over the tuning range less than 0.2 [dB], respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 [dBc/Hz] at 100 [KHz] offset from carrier, and The second harmonic suppression is less than -41.49 [dBc]. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

Evaluation Toolkit for K-FPGA Fabric Architectures (K-FPGA 패브릭 구조의 평가 툴킷)

  • Kim, Kyo-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.4
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    • pp.15-25
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    • 2012
  • The research on the FPGA CAD tools in academia has been lacking practicality due to the underlying FPGA fabric architecture which is too simple and inefficient to be applied for commercial FPGAs. Recently, the database of placement positions and routing graphs on commercial FPGA architectures has been built, and provided for enabling the academic development of placement and routing tools. To extend the limit of academic CAD tools even further, we have developed the evaluation toolkit for the K-FPGA architecture which is under development. By providing interface for exchanging data with a commercial FPGA toolkit at every step of mapping, packing, placement and routing in the tool chain, the toolkit enables individual tools to be developed without waiting for the results of the preceding step, and with no dependency on the quality of the results, and compared in detail with commercial tools at any step. Also, the fabric primitive library is developed by extracting the prototype from a reporting file of a commercial FPGA, restructuring it, and modeling the behavior of basic gates. This library can be used as the benchmarking target, and a reference design for new FPGA architectures. Since the architecture is described in a standard HDL which is familiar with hardware designers, and read in the tools rather than hard coded, the tools are "data-driven", and tolerable with the architectural changes due to the design space exploration. The experiments confirm that the developed library is correct, and the functional correctness of applications implemented on the FPGA fabric can be validated by simulation. The placement and routing tools are under development. The completion of the toolkit will enable the development of practical FPGA architectures which, in return, will synergically animate the research on optimization CAD tools.

Performance enhancement of Organic Thin Film Transistor using C60 hole injection layer (C60(buckminsterfullurene) 홀주입층을 적용한 유기박막트랜지스터의 성능향상)

  • Yi, Moon-Suk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.19-25
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    • 2008
  • In this study, we fabricated Organic Thin Film Transistors(OTFTs) with C60 hole injection layer between organic semiconductor(pentacene) and metal electrode, and we compared the electrical characteristics of OTFTs with/without C60. When the C60 hole injection layer was introduced, the mobility and the threshold voltage were improved from 0.298 cm2/Vs and -13.3V to 0.452 cm2/Vs and -10.8V, and the contact resistance was also reduced. When the C60 is inserted, the hole injection was enhanced because the C60 prevent the unwanted chemical reaction between pentacene and Au. Furthermore, we fabricated the OTFTs using Al as their electrodes. When the OTFTs were made by only aluminum electrode, the channel were not mostly made because of the high hole injection barrier between pentacene and aluminum, but when the C60 layer with an optimal thickness was applied between aluminum and pentacene, the device performances were obviously enhanced because of the vacuum energy level shift of Al and the consequent decrease of the hole injection barrier which was induced by the interface dipole formation between C60 and Al. The mobility and ION/IOFF current ratio of OTFT with C60/Al electrode were 0.165 cm2/Vs and 1.4×104 which were comparable with the normal Au electrode OTFT.

Particle Behavior of Silver Nanoparticles Synthesized by Electrical Resistance Analysis (전기저항 분석을 통한 은나노 입자 합성 시의 입자거동 연구)

  • Yoon, Young Woo;Ryu, Si Hong;Yang, Sung Joo;Lee, Seong Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.8
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    • pp.531-538
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    • 2015
  • This study examined the size and shape of the nano-silver particle through the analysis of electrical resistance when synthesizing nano-sized silver by using the chemical liquid reduction. Changes in particle behaviors formed according to the changes in electronic characteristics by electric resistance in each time period in the beginning of reduction reaction in a course of synthesizing the nano-silver particle formation were studied. In addition, analysis was conducted on particle behaviors according to the changes in concentration of AgNO3 and in temperature at the time of reduction and nucleation and growth course when synthesizing the particles based on the particle behaviors were also examined. As the concentration of AgNO3 increased, the same amount of resistance of approximately 5Ω was increased in terms of initial electronic resistance. Furthermore, according to the result of formation of nuclear growth graph and estimation of slope based on estimated resistance, slops of 6.25×103, 2.89×103, and 1.85×103 were derived from the concentrations of 0.01 M, 0.05 M, and 0.1 M, respectively. As the concentration of AgNO3 increased, the more it was dominantly influenced by the nuclear growth areas in the initial phase of reduction leading to increase the size and cohesion of particles. At the time of reduction of nano-silver particle, the increases of initial resistance were 4Ω, 4.2Ω, 5Ω, and 5.3Ω, respectively as the temperature increased. As the temperature was increased into 23C, 40C, 60C, and 80C, slopes were formed as 4.54×103, 4.65×103, 5.13×103, and 5.42×103 respectively. As the temperature increased, the particles became minute due to the increase of nuclear growth area in the particle in initial period of reduction.

Synthesis and Latent Characteristics of Thermal Cationic Latent Catalysts by Change of Substituent (치환기 변화에 따른 열잠재성 양이온 촉매의 합성과 잠재특성 연구)

  • Park, Soo-Jin;Heo, Gun-Young;Lee, Jae-Rock;Shim, Sang-Yeon;Suh, Dong-Hack
    • Polymer(Korea)
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    • v.25 no.4
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    • pp.558-567
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    • 2001
  • The syntheses of thermal latent catalysts have been carried out by modifying the substituent of pyrazinium salts. The thermal latent properties and cure behaviors of difunctional epoxy resin (diglycidylether of bisphenol-A, DGEBA) with 1 wt% of catalyst as an initiator were investigated by dynamic DSC method. As a result, the synthesized catalysts showed the good latent thermal properties in epoxy system. With increasing the basicity of substituted catalyst, the cure temperature and activation energy of epoxy system were increased, whereas the activity was decreased. This was probably due to the fact that the activity and cure behavior were controlled by ring strain and basicity of substituent. Consequently, the catalyst activity modified by methyl group as an electron donor was decreased in increasing of basicity in an initiation step of epoxy cure system. This is due to a decreasing of stabilities of both leaving group of pyrazinium salts and benzyl cation. However, the catalyst activity modified by cyano group as an electron acceptor was increased in increasing the stability of benzyl cation resulting from organic effects and resonance.

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Changes in the Hosptal Length of Stay and Medical Cost between before and after the Applications of the DRG payment system using Health Insurance Big Data (건강보험 빅 데이터를 활용한 종합병원에서의 포괄수가제 적용 전·후 재원일수와 진료비의 변화)

  • Jeong, Su-Jin;Choi, Seong-Woo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.2
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    • pp.401-410
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    • 2017
  • This study aimed to identify appropriateness and efficiency in the DRG payment system by analysing the hospital length of stay and changes in fees before and after the application of DRG payment system. The subjects of the study were a total of 398 patients consisting of 204 for the fee for service system and 194 for the DRG payment system. They received surgery in the Obstetrics and Gynecology (OBGY) department of a general hospital in G metropolitan city between January and December 2013. The mean hospital length of stay was significantly decreased after application of the DRG payment system(p=0.013). Total fees, insurance charges, and deductions increased significantly(p<0.001), and non-payment charges and total deductions decreased significantly(p<0.001). Application of the DRG payment system reduced length of stay, non-payment charges and total patient's cost sharing and increased out-of-pocket, insurance charges, and total fees.