• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.1
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• pp.23-34
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• 2004

This paper presents architecture and control method of packet scheduler to guarantee QoS of high quality streaming services in high-speed packet-switched networks. Since streaming services need far more stringent QoS requirements than the typical sort of burst data applications, they should be guaranteed minimum bandwidth and end-to-end delay bound to each flow, regardless of the behavior of other flows. To meet these requirements, a packet scheduler isolate a flow from the undesirable effects of other flows and provides end-to-end delay guarantees for individual flow and divides stringently the available link bandwidth among flows sharing the link. Until now, many vendors are developing traffic management chips running at 10Gbps, but most of chips have drawbacks to support high quality streaming services. In this paper, we investigate the drawbacks of commercial TM chips and traffic characteristic of streaming services and present implementation frameworks of the proposed packet scheduler. Finally, we analyze the simulation results of the proposed scheduler.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.42 no.5
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• pp.9-20
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• 2005

In this paper, we propose ubiTrack, a system which tracks users' location in indoor environments by employing infrared-based proximity method. Most of recently developed systems have focussed on performance and accuracy. For this reason, they adopted the idea of centralized management, which gathers all information in a main system to monitor users' location. However, these systems raise privacy concerns in ubiquitous computing environments where tons of sensors are seamlessly embedded into environments. In addition, centralized systems also need high computational power to support multiple users. The proposed ubiTrack is designed as a passive mobile architecture to relax privacy problems. Moreover, ubiTrack utilizes appropriate area as a unit to efficiently track users. To achieve this, ubiTrack overlaps each sensing area by utilizing the TDM (Time-Division Multiplexing) method. Additionally, ubiTrack exploits various filtering methods at each receiver and utilization module. The filtering methods minimize unexpected noise effect caused by external shock or intensity weakness of ID signal at the boundary of sensing area. ubiTrack can be applied not only to location-based applications but also to context-aware applications because of its associated module. This module is a part of middleware to support communication between heterogeneous applications or sensors in ubiquitous computing environments.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.215-224
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• 2013

An efficient homography estimation method for large sized images is proposed. Estimating an accurate homography is one of the most important parts in image stitching processes. Since hardwares have been advanced, it has been passible to take higher resolution images. However, computational cost for estimating homography has been also increased. Specifically, when too many features exist in the images, it requires lots of computations to estimate a correct homography. Furthermore, there is a high probability of obtaining an incorrect homography. Therefore, we propose a numerical method to extract the appropriate correspondences from several down-scaled images to estimate and compensate the homography numerically for restoring an original homography. Also, if there is an unbalance in color tone between the reference and the target images, we make them balanced by using local information of the overlapped regions. Experimental results show that proposed method is three times faster in 3.2 mega pixel images, five times faster in 8mega pixel images than the conventional approach. Therefore, we believe that the proposed method can be a useful tool to efficiently estimate a homography.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.3
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• pp.97-107
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• 2017

In the field of automatic door, the infrared rays and microwave sensor are much used as the important components in charge of the motor's operation control of open and close through the incoming signal of object recognition. In case of existing system that the sensor of the infrared rays and microwave are applied to the automatic door, there are many malfunctions by the infrared rays and visible rays of the sun. Because the automatic doors are usually installed outside of building in state of exposure. The environmental change by temperature difference occurs the noise of object recognition detection signal. With this problem, the hardware fault that the detection sensor is unable to follow the object moving rapidly within detection area makes the sensing blind spot. This fault should be improved as soon as possible. Because It influences safety of passengers who use the automatic doors. This paper conducted an experiment to improve the detection area by installing extra ultrasonic sensor besides existing detection sensor. So, this paper realize the computing circuit and detection algorithm which can correctly and rapidly process the access route of objects moving fast and the location area of fixed obstacles by applying detection and advantages of ultrasonic signal to the automatic doors. With this, It is proved that the automatic door applying ultrasonic sensor is improved detection area of blind spot sensing through field test and improvement plan is proposed.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.1 s.307
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• pp.45-52
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• 2006

In this paper, a real-time stereoscopic image conversion method using a single frame from a 2-D image is proposed. The Stereoscopic image is generated by creating depth map using vortical position information and parallax processing. For a real-time processing of stereoscopic conversion and reduction of hardware complexity, it uses image sampling, object segmentation by standardizing luminance and depth map generation by boundary scan. The proposed method offers realistic 3-D effect regardless of the direction, velocity and scene conversion of the 2-D image. It offers effective stereoscopic conversion using images suitable conditions assumed in this paper such as recorded image at long distance, landscape and panorama photo because it creates different depth sense using vertical position information from a single frame. The proposed method can be applied to still image because it uses a single frame from a 2-D image. The proposed method has been evaluated using visual test and APD for comparing the stereoscopic image of the proposed method with that of MTD. It is confirmed that stereoscopic images conversed by the proposed method offers 3-D effect regardless of the direction and velocity of the 2-D image.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.39-50
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• 1998

Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.3 s.345
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• pp.84-94
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• 2006

In this paper, we propose the algorithm to reduce guard time of UWB MAC time slot for throughput gain. In the proposed draft by multiband ofdm alliance (MBOA), Guard time of each medium access slot (MAS) is composed of shortest inter-frame space (SIFS) and MaxDrift which is the time caused by maximum frequency offset among devices. In this paper, to reduceguard time means that we nearly eliminate MaxDrift term from guard time. Each device of a piconet computes relative frequency offset from the device initiating piconet using periodically consecutive transferred beacon frames. Each device add or subtract the calculated relative frequency offset to the estimated each MAS starting point in order to synchronize with calculated MAS starting point of the device initiating piconet. According to verification of simulations, if the frequency offset estimator is implemented with 8 decimal bit, the ratio of the wasted time to Superframe is always less than 0.0001.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.1 s.307
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• pp.1-8
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• 2006

This thesis proposes Arithmetic Shift Register(ASR) which can be used as pseudo random number generator. Arithmetic Shift. Register is defined as progression that multiplies random number D , not 0 or 1 at initial value which is not 0, and it is represented as ASR-D in this thesis. Irreducible polynomial that t which makes $'D^k=1'$ satisfies uniquely as $'t=2^n-1'$ over. $GF(2^n)$ is the characteristic polynomial of ASR-D , and the cycle of Arithmetic Shift Register has maximum cycle as $'2^n-1'$. Galois Linear Feedback Shift Register corresponds to ASR-2-1. Therefore, Arithmetic Shift Register proposed in this thesis generalizes Galois Linear Feedback Shift Register. Linear complexity of ASR-D over$GF(2^n)$ is $'n{\leq}LC{\leq}\frac{n^2+n}{2}'$ and in comparison with existing Linear Feedback Shift Register stability is high. The Software embodiment of arithmetic shift register proposed in this thesis is efficient than that of existing Linear Shift Register and hardware complexity is equal. Arithmetic shift register proposed in this thesis can be used widely in various fields such as cipher, error correcting codes, Monte Carlo integral, and data communication etc along with existing linear shift register.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.989-992
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• 1999

Battery로 작동되고, 소형인 제품들도 다양한 기능은 물론이고, 다양한 입출력 장치를 갖추고, 실시간으로 처리하는 시스템이 많이 요구되고 있는 실정이며, 점차 더욱 더 요구될 것으로 전망된다. 더욱이 포터블 기기는 일반적으로 MCU의 내부에 제한된 ROM type 메모리를 내장하게 되면, 데이터 메모리로 SRAM 및 flash memory를 갗추고 있다. 따라서 이러한 제한된 하드웨어 환경하에서 많은 기능을 수행해야 하는 경우가 많다. 여러 기능을 시간적인 간격으로 배분하거나, 기능 자체를 서로 배분하면서, 서로 융합하는 등의 여러 가지 기능을 수행하려다보면, 당연히 메인 소프트웨어 구조가 복잡해지며 대부분 어셈블리나 C와 같은 linear한 구조를 가지는 language로 개발되기 때문에 효과적인 프로그램 구조를 세우기는 쉽지 않다. 본 논문에서는 이를 위해 좀더 규격화된 방법을 제시하고자 한다. 보다 구체적인 구조를 연구할 목적으로 다양한 테스크를 수행하여야 하는 시스템이면서 프로세서가 필요한 포터블 기기의 한 응용 제품인 MP3 Player 에서 요구되는 job scheduling을 연구한다. 필요한 작업의 종류는 가장 부하가 많이 걸리는 압축된 MP3 file을 다시 복원시켜주는 codec 부분과 일정 시간 간격을 가지고 수행하여야 하는 외부 키보드 입력과 실시간으로 시간을 계산하는 타이머 기능, 그리고 LCD에 시간의 변화를 표시하여 주어야한다. 이와같이 수시로 작업이 발생하지만 시간 점유율이 중간 정도인 LCD 컨트롤과 메모리 컨트롤 등이다. 프로세서의 속도를 최소한으로 줄이면서 스케줄링에 의해 시간 문제를 해결하는 방법을 제시하도록 한다. 이는 기초과학 수준이 높은 북방권 국가들의 과학자들이 주로 활용되고 있다는 점에서도 잘 알 수 있으며 우리의 과학기술 약점을 보완하는 원천으로써 외국인 연구 인력이 대안이 되고 있음을 시사한다. 본 연구에서는 한국 연구 조직에서 일하는 외국인 연구자들의 동기 및 성과에 영향을 미치는 많은 요인들을 확인할 수 있었다. 상관관계, 분산분석, 회귀분석 등을 통해 활용 성과에 미치는 영향 요인들을 도출하였다. 설문 분석을 통하여 동기 및 성과 사이에는 강한 상관관계가 존재하는 것을 확인할 수 있었으며 이는 전통적인 동기 이론들과 부합한다. 대부분의 변수가 동기 및 성과에 동시에 영향을 미치는 것으로 조사되었으며 그중에서도 조직 협력 문화, 외국인 연구자의 의사소통 및 협력성, 외국인 연구자의 연구 능력 관련 변수들 및 연구 프로젝트의 기술수명주기, 외국인 연구자의 기존 기술지식의 흡수 등이 가장 중요한 변수로 나타났다. 이는 우리가 주로 중국 및 러시아 과학자들을 활용하여 상업화하는 외국인 연구인력 활용 패턴과도 일치하는 결과이다. 즉 우호적인 조직문화를 가지고 있는 연구 조직에서, 이미 과학기술 지식을 많이 가지고 있고 연구 능력도 높은 외국인 과학기술자를, 한국에서 기술이 태동 또는 성장하고 있는 연구 분야에서 활용하는 것이 가장 성과가 좋다는 사실을 확인시켜 주고 있다. 국내에서 최초로 수행된 본 연구는 외국인 연구 인력의 활용 성과가 매우 높으며, 우리의 과학기술혁신시스템을 보완하는 유효한 수단으로써 외국인 연구 인력이 중요한 대안이 될 수 있음을 발견하였다. 외국인 연구 인력을 잘 활용하기 위하여 문제점 및 개선방안을 활용 환경, 연구 인력이 중요한 대안이 될 수

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.50-61
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• 2010

Nowadays, the SoC is watched by all over the world with interest. The design trend of the SoC is hardware and software co-design which includes the design of hardware structure in RTL level and the development of embedded software. Also the technology is toward deep-submicron and the observability of the SoC's internal state is not easy. Because of the above reasons, the SoC debug is very difficult and time-consuming. So we need a reliable debugger to find the bugs in the SoC and embedded software. In this paper, we developed a hardware debugger named OCD. It is based on IEEE 1140.1 JTAG standard. In order to verify the operation of OCD, it is integrated into the 32bit RISC processor - Core-A (Core-A is the unique embedded processor designed by Korea) and is tested by interconnecting with software debugger. When embedding the OCD in Core-A, there is 14.7% gate count overhead. We can modify the DCU which occupies 2% gate count in OCD to adapt with other processors as a debugger.