• Title/Summary/Keyword: 전자정당

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Verifiable self-certified schemes based on ${\gamma}$th -residuosity problem (고차잉여류 문제에 기반한 검증 가능한 자체인증방식)

  • 이보영
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.9 no.4
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    • pp.61-70
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    • 1999
  • In this paper we propose the verifiable self-certified schemes(key distribution scheme identification scheme digital signature scheme) based on ${\gamma}$th -residuosity which make up for defects of Girault's self-certified schemes allow the authenticity of public keys to be verified during the use of the keys. The security of our schemes is based on the difficulty of ${\gamma}$th -residuosity problem and discrete logarithm problem simultaneously.

Design of Divisible Electronic Cash based on Double Hash Chain (이중해쉬체인에 기반한 분할 가능 전자화폐의 설계)

  • 용승림;이은경;이상호
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.7_8
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    • pp.408-416
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    • 2003
  • An electronic cash system has to provide the security, to prevent the double spending and to support the divisibility of electronic cash for the easy of use. Divisible electronic cash system allows an electronic cash to be divided into subdivisions. Each subdivision is worth any desired value, but all values must add up to the original cash value. Divisible scheme brings some advantages. It reduces to make the change and also there is no necessity that a customer must withdraw a cash of the desired value whenever transactions occur. In this paper, we present an electronic cash protocol which provides the divisibility based on the double hash chain technique. Electronic cash is constructed in the form of coins. Coins, generated by the double hush chain, have different denominations. The divisibility based on the double hash chain technique. Electronic cash is constructed in the form of coins. Coins, generated by the double hash chain, have different denominations. The divisibility of an electronic cash is satisfied by the payment certificate, which is a pair of bank´s proxy signature received from the bank. When a customer pays the coin of subdivision, the fairness of that coin is certified by a customer´s signing instead of a bank. Although the proposed method does not guarantee user´s anonymity, it generates coins which cannot be forged, and the customer can use an electronic cash conveniently and efficiently with its divisibility.

A Critical Review of Political Conspiracy in Korea (한국정치에서 음모론과 선거의 연관성: '장준하 사망', '광주민주화운동', '천안함 침몰'을 중심으로)

  • Chung, Tae-Il
    • Korea and Global Affairs
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    • v.1 no.1
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    • pp.7-30
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    • 2017
  • The conspiracy theories of political events are occurring in every country and society. In Korean society, conspiracy theories about political events are constantly happening. Conspiracy refers to the phenomenon of a particular individual or group who oppose the official causes of social phenomena. Conspiracy is a resistance to the credibility of the state and the government. In Korean society, conspiracy occurs mainly in political events. The conspiracy theories of political events appear in the form of conservatism and progressivism, which seeks to replace political power and political power to stabilize political power. The conspiracy theory about Jang Jun-Ha's death occurred in the process of seeking justification for a person who is resisting the ruling forces. Also, the conspiracy theory of the Gwangju Democratization Movement and the Cheonan Warship Sinking may be a drag on the justification for the justification for the takeover of the new military government and the justification for the Disconnection of inter-Korean relations. In Korean politics, Conspiracy theory is a factor that confuses Korean society regardless of whether it is true or not.

Adaptive Dynamic Slot Assignment of VBR Traffics Using In-band Parameters in Wireless ATM (무선 ATM에서 In-Band 파라미터를 이용한 VBR 트래픽의 적응적 슬롯 할당)

  • Paek, Jong-Il;Jun, Chan-Yong;Kim, Young-Chul
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.7
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    • pp.30-37
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    • 2002
  • In this paper, we propose a new adaptive slot assignment algorithm called In-VDSA in order to guarantee the QoS(Quality of Service) of VBR(Variable Bit Rate) traffics in wireless ATM and maximize efficiency in use of wireless channels. In the proposed algorithm, the status of terminal buffers is encoded in signed number on the GFC(Generic Flow Control) field of an ATM cell header and piggybacked. And also, the number of slots to be assigned to the next frame is adjusted effectively, which is different to methods in the conventional slot assignment algorithms. As a result, we can guarantee QoS such as CLR(Cell Loss Rate) and cell delay and achieve the higher utilization of channels. The validity of the proposed algorithm has been justified in performance by analysis through simulation results using the BONeS tool and comparison with conventional methods.

A VLSI Pulse-mode Digital Multilayer Neural Network for Pattern Classification : Architecture and Computational Behaviors (패턴인식용 VLSI 펄스형 디지탈 다계층 신경망의 구조및 동작 특성)

  • Kim, Young-Chul;Lee, Gyu-Sang
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.1
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    • pp.144-152
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    • 1996
  • In this paper, a pulse-mode digital multilayer neural network with a massively parallel yet compact and flexible network architecture is presented. Algebraicneural operations are replaced by stochastic processes using pseudo-random pulse sequences and simple logic gates are used as basic computing elements. The distributions of the results from the stochastic processes are approximated using the hypergeometric distribution. A statistical model of the noise(error) is developed to estimate the relative accuracy associated with stochastic computing in terms of mean and variance. Numerical character recognition problems are applied to the network to evaluate the network performance and to justify the validity of analytic results based on the developed statistical model. The network architectures are modeled in VHDL using the mixed descriptions of gate-level and register transfer level (RTL). Experiments show that the statistical model successfully predicts the accuracy of the operations performed in the network and that the character classification rate of the network is competitive to that of ordinary Back-Propagation networks.

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A Study on the High Frequency Resonant Inverter using ZVS suitable for IH-Jar (IH-Jar에 적합한 ZVS를 이용한 고주파 공진 인버터에 관한 연구)

  • Park, Dong-Han;Lee, Jong-Hyeon;Oh, Ji-Yong;Kim, Gu-Yong;Kim, Hae-Jun;Won, Jae-Sun;Kim, Jong-Hae
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.870-873
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    • 2018
  • This paper presents the high frequency resonant inverter using ZVS(Zero Voltage Switching) known as the soft switching technology, which can reduce the turn-on and turn-off switching losses. Also, the analysis of the proposed resonant inverter is described by adopting normalized parameters, and its operating characteristics are evaluated according to the switching frequency and parameters. An example of 1.3[kW] IH-Jar design technique is presented based on the characteristic values obtained from the theoretical analysis. To prove the validity of the theoretical analysis, the experimental results using IGBT as the switching devices are additionally presented. In the future, it can be practically used in various power systems such as induction heating cooking, IH-Jar etc.

A High-Performance Position Sensorless Motion Control System of Reluctance Synchronous Motor with Direct Torque Control (직접토크제어에 의한 위치검출기 없는 릴럭턴스 동기전동기의 위치 제어시스템)

  • 김동희;김민회;김남훈;배원식
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.5
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    • pp.427-436
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    • 2002
  • This paper presents an implementation of high-dynamic performance of position sensorless motion control system of Reluctance Synchronous Motor(RSM) drives for an industrial servo system with direct torque control(DTC). The problems of high-dynamic performance and maximum efficiency RSM drives controlled by DTC are saturation of stator linkage flux and nonlinear inductance characteristics with various load currents. The accurate estimation of the stator flux and torque are obtained using stator flux observer of which a saturated inductance $L_d$ and $L_q$ can be compensated by adapting from measurable the modulus of the stator current and rotor position. To obtain fast torque response and maximum torque/current with varying load current, the reference command flux is ensured by imposing $I_{ds} = I_{qs}$. This control strategy is proposed to achieve fast response and optimal efficiency for RSM drive. In order to prove rightness of the suggested control algorithm, the actual experiment carried out at $\pm$20 and $\pm$1500 rpm. The developed digitally high-performance motion control system shown good response characteristic of control results and high performance features using 1.0kW RSM which has 2.57 Ld/Lq salient ratio.

A Characteristic Analysis of Single-Power-Stage High Frequency Resonant AC-DC Converter with High Power Factor (고역률 단일 전력단 고주파 공진 AC-DC 컨버터의 특성해석)

  • 남승식;원재선;황계호;오경섭;박재욱;김동희;오승훈
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.4
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    • pp.372-380
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    • 2004
  • This paper proposes a single-power-stage high frequency resonant AC-DC converter with high power factor using ZVS(Zero Voltage Switching), and integrates a conventional converter with two stage into single stage converter. Input power factor is possible to be improved as a high power factor because inductor for power factor correction(PFC) is connected in input and converter is operated in discontinued current mode(DCM) with constant duty cycle and variable switching frequency. The conventional converter with two stage need to add a switch in order to control a power factor, but single stage converter have a advantage that system is simple and cost is down, confidence is improved, etc. This paper described a operation principle and characteristic analysis for single stage AC-DC converter with high power factor and have evaluated characteristic values by using normalized parameter. We make a experimental equipment using MOSFET as a switching device on the basis of characteristic values obtained from characteristic evaluations and we conform a rightfulness of theoretical analysis by comparing theoretical waveforms and experimental waveforms.

Design of a Built-In Current Sensor for CMOS IC Testing (CMOS 집적회로 테스팅을 위한 내장형 전류 감지 회로 설계)

  • Kim, Tae-Sang;Hong, Seung-Ho;Kwak, Chul-Ho;Kim, Jeong-Beam
    • Journal of IKEEE
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    • v.9 no.1 s.16
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    • pp.57-64
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    • 2005
  • This paper presents a built-in current sensor(BICS) that detects defects in CMOS integrated circuits using the current testing technique. This circuit employs a cross-coupled connected PMOS transistors, it is used as a current comparator. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT) and high speed detection time. In addition, in the operation of the normal mode, the BlCS does not have dissipation of extra power, and it can be applied to the deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The area overhead of a BlCS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS standard technology.

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A Study on the High Frequency Resonant Inverter of Class D SEPP type using LS-ZVS-LSTC (LS-ZVS-LSTC를 이용한 D급 SEPP형 고주파 공진 인버터에 관한 연구)

  • Park, Dong-Han;Choi, Byeong-Joo;Kim, Jong-Hae
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.260-268
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    • 2020
  • This paper presents the high frequency resonant inverter of class D SEPP(Single-Ended Push Pull) type using LS-ZVS-LSTC, which can reduce the switching losses during the turn-on and turn-off switching time. The analysis of high frequency resonant inverter using LS-ZVS-LSTC(Low-loss Turn-off Snubber Capacitor) proposed in this paper is described in general by adopting the normalized parameters. The operating characteristics of the proposed high frequency resonant inverter were also evaluated by using the control parameters such as the normalized control frequency(μ), the normalized load time constant(τ), the coupling factor(κ) and so on. Based on the characteristic values through the characteristics of evaluation, an example of the design method of the 1.8[kW] class D SEPP type high frequency inverter is suggested, and the validity of the theoretical analysis is verified using the experimental data.