• Title/Summary/Keyword: 전압 발생기

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Characteristics Analysis of Transient Impedances of Small-sized Ground Electrodes in a Ionization Region of Soil (토양의 이온화영역에서 소규모 접지전극의 과도접지임피던스 특성 분석)

  • Yoo, Yang-Woo;Eom, Ju-Hong;Cho, Sung-Chul;Lee, Tae-Hyung;Lee, Bok-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.6
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    • pp.78-84
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    • 2009
  • This paper presents measurement results of transient impedance for small-sized ground electrodes in a discharge region of soil. For a realistic analysis of ionization characteristics near the ground electrode, three types of ground rod installed outdoors and high voltage impulse generator were used for injecting test current. From the analysis of response voltage and current flowing ground electrode to earth, it is verified that the ionization near the ground electrode contributes to reduction of ground impedance and limits the ground potential rise effectively in high resistivity soil. As a threshold electric field density for ionization is small in low resistivity soil, the shape of ground electrode rarely contributes to the transient impedance. And, from the experiment result with shape of ground electrode, the rod with needles is more effective to reduce the transient impedance than the plate electrode in the voltage range including with ionization regions of soil.

A Study on the Correction of Protection Relay of Temporary Electric Power Installations for Storage Tank (저장 탱크용 임시전력설비의 보호계전기 정정에 관한 연구)

  • Son, Seok-Geum
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.6
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    • pp.562-567
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    • 2020
  • In this paper, this is a study on the correction of protection relays to monitor temporary power facilities for storage tanks especially transformers to block and protect faults such as insulation breakdown. When an abnormality such as a short circuit or a ground fault occurs in the power system, it is important to detect this quickly cut off the device and equipment in which the fault occurred and separate it from the power system to correct the protection relay so that it does not interfere with power supply. In addition the fault current calculation that accurately applies the fault type and the cause of the fault for protection cooperation will be the most important factor in the correction of the protection relay. For protection coordination a study was conducted on the method of coordination for protection of power facility protection for storage tanks such as over current relay, ground over current relay, under voltage relay, and ground over voltage relay applied to temporary.

A UHF-band Passive Temperature Sensor Tag Chip Fabricated in $0.18-{\mu}m$ CMOS Process ($0.18-{\mu}m$ CMOS 공정으로 제작된 UHF 대역 수동형 온도 센서 태그 칩)

  • Pham, Duy-Dong;Hwang, Sang-Kyun;Chung, Jin-Yong;Lee, Jong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.45-52
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    • 2008
  • We investigated the design of an RF-powered, wireless temperature sensor tag chip using $0.18-{\mu}m$ CMOS technology. The transponder generates its own power supply from small incident RF signal using Schottky diodes in voltage multiplier. Ambient temperature is measured using a new low-power temperature-to-voltage converter, and an 8-bit single-slope ADC converts the measured voltage to digital data. ASK demodulator and digital control are combined to identify unique transponder (ID) sent by base station for multi-transponder applications. The measurement of the temperature sensor tag chip showed a resolution of $0.64^{\circ}C/LSB$ in the range from $20^{\circ}C$ to $100^{\circ}C$, which is suitable for environmental temperature monitoring. The chip size is $1.1{\times}0.34mm^2$, and operates at clock frequency of 100 kHz while consuming $64{\mu}W$ power. The temperature sensor required a -11 dBm RF input power, supported a conversion rate of 12.5 k-samples/sec, and a maximum error of $0.5^{\circ}C$.

Degradation Properties of ZnO Surge Arresters Due to Lightning Impulse Currents (뇌임펄스전류에 의한 ZnO 피뢰기의 열화특성)

  • Lee, Su-Bong;Lee, Bok-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.4
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    • pp.79-85
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    • 2009
  • This paper describes the degradation properties of ZnO surge arresters impressed by lightning impulse currents. To investigate the deterioration behaviors of ZnO surge arresters due to lightning surges, the 8/20[${\mu}s$], 2.5[kA] standard lightning impulse currents were injected to the ZnO surge arrester under test. The power frequency AC and DC leakage currents flowing through the ZnO surge arresters with and without the injection of lightning impulse currents were measured. As a result, the leakage currents are increased and the asymmetry of the AC leakage current is pronounced as the number of injection of the impulse current increases. The ZnO grain of the surge arrester without the injection of lightning surges are uniform but the ZnO grain of the ZnO surge arrester with the injection of lightning impulse currents are deformed. Also, it was found that the decrease of the $Bi_2O_3$ due to the lightning impulse current leads to the lack of grain boundary layer and the current concentrated by the lack of grain boundary layer play an important role to degrade nonlinear property of ZnO surge arrester blocks.

High Performance Control of IPMSM using SV-PWM Method Based on HAI Controller (HAI 제어기반 SV PWM 방식을 이용하나 IPMSM의 고성능 제어)

  • Choi, Jung-Sik;Ko, Jae-Sub;Chung, Dong-Hwa
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.8
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    • pp.33-40
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    • 2009
  • This paper presents the high performance control of interior permanent magnet synchronous motor(IPMSM) using space vector(SV) PWM method based on hybrid artificial intelligent(HAI) controller. The HAI controller combines the advantages between adaptive fuzzy control and neural network The SV PWM method is applied to a speed control system of motor in the industry field until now and is feasible to improve harmonic rate of output current, switching frequency and response characteristics. This HAI controller is used instead of conventional PI controller in order to solve problems happening when calculating a reference voltage. The HAI controller improves speed performance by hybrid combination of reference model-based adaptive mechanism method, fuzzy control and neural network. This paper analyzes response characteristics of parameter variation, steady-state and transient-state using proposed HAI controller and this controller compares with conventional fuzzy neural network(FNN) and PI controller. Also, this paper proves validity of HAI controller.

Electrochemical Degradation of Phenol by Using Reticulated Vitreous Carbon Immobilized Horseradish Peroxidase (Horseradish Peroxidase가 고정화된 다공성 탄소 전극을 이용한 페놀의 전기화학적 분해)

  • Cho, Seung-Hee;Yeon, Kyeong-Ho;Kim, Gha-Young;Shim, Joon-Mok;Moon, Seung-Hyeon
    • Journal of Korean Society of Environmental Engineers
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    • v.27 no.12
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    • pp.1263-1269
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    • 2005
  • Horseradish peroxidase, had the phenol degradation rate of 95% in aqueous phase, was covalently immobilized on the surface of reticulated vitreous carbon(RVC) and the degradation of phenol was performed with in situ generated $H_2O_2$-immobilized HRP complex in an electrochemical reactor. The incorporation of carboxylic group on the RVC surface was confirmed by FT/IR spectrometry and 1-ethyl-3-(3-dimethylaminopropyl) carbodiimide hydrochloride(EDC) was used for peptide bonds between the carboxylic groups on the RVC surface and amine groups from HRP. The optimal conditions of in situ $H_2O_2$ generation such as concentration($10{\sim}200$ mM) and pH($5.0{\sim}8.0$) of electrolyte, supply of $O_2(10{\sim}50$ mL/min) and applied voltage($-0.2{\sim}-0.8$ volt, vs. Ag/AgCl) from potentiostat/galvanostat were determined by concentration of hydrogen peroxide and current efficiency. It was observed that the RVC immobilized HRP was stable maintaining 89% of the initial activity during 4 weeks. The phenol degradation rate of 86% was attained under the optimal condition of in situ $H_2O_2$ generation.

The New Type Pulse Generator Adopted Cascading Technique (소형트랜스의 Cascading 방식을 적용한 임펄스 출력특성)

  • Kyung-Ae Shin;Whi-Young kim;Myeong-Soon Kim
    • Journal of the Korea Computer Industry Society
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    • v.2 no.3
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    • pp.363-368
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    • 2001
  • This paper introduced cascading technique as a new technology composed of two pulse transformers and presented the experimental data and results. To obtain the stable pulse voltage adopted cascading technique, we designed and tested a compact pulse generator by adjusting the load resistors and input voltage. Adopting cascading technique to load, we found that average cascading voltage was about 62$\%$ of theoretical value. Cascading ratio was calculated at almost 19 compared with non cascading voltage.

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A l0b 150 MSample/s 1.8V 123 mW CMOS A/D Converter (l0b 150 MSample/s 1.8V 123 mW CMOS 파이프라인 A/D 변환기)

  • Kim Se-Won;Park Jong-Bum;Lee Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.1
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    • pp.53-60
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    • 2004
  • This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.

A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems (초광대역 통신시스템 응용을 위한 이중채널 6b 1GS/s 0.18um CMOS ADC)

  • Cho, Young-Jae;Yoo, Si-Wook;Kim, Young-Lok;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.47-54
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    • 2006
  • This work proposes a dual-channel 6b 1GS/s ADC for ultra wide-band communication system applications. The proposed ADC based on a 6b interpolated flash architecture employs wide-band open-loop track-and-hold amplifiers, comparators with a wide-range differential difference pre-amplifier, latches with reduced kickback noise, on-chip CMOS references, and digital bubble-code correction circuits to optimize power, chip area, and accuracy at 1GS/s. The ADC implemented in a 0.18um 1P6M CMOS technology shows a signal-to-noise-and-distortion ratio of 30dB and a spurious-free dynamic range of 39dB at 1GS/s. The measured differential and integral non-linearities of the prototype ADC are within 1.0LSB and 1.3LSB, respectively. The dual-channel ADC has an active area of $4.0mm^2$ and consumes 594mW at 1GS/s and 1.8V.

A Single-Bit 2nd-Order CIFF Delta-Sigma Modulator for Precision Measurement of Battery Current (배터리 전류의 정밀 측정을 위한 단일 비트 2차 CIFF 구조 델타 시그마 모듈레이터)

  • Bae, Gi-Gyeong;Cheon, Ji-Min
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.3
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    • pp.184-196
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    • 2020
  • In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for precision measurement of current flowing through a secondary cell battery in a battery management system (BMS). The proposed modulator implements two switched capacitor integrators and a single-bit comparator with peripheral circuits such as a non-overlapping clock generator and a bias circuit. The proposed structure is designed to be applied to low-side current sensing method with low common mode input voltage. Using the low-side current measurement method has the advantage of reducing the burden on the circuit design. In addition, the ±30mV input voltage is resolved by the ADC with 15-bit resolution, eliminating the need for an additional programmable gain amplifier (PGA). The proposed a single-bit 2nd-order delta-sigma modulator has been implemented in a 350-nm CMOS process. It achieves 95.46-dB signal-to-noise-and-distortion ratio (SNDR), 96.01-dB spurious-free dynamic range (SFDR), and 15.56-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 400 for 5-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 670×490 ㎛2 and 414 ㎼, respectively.