• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.8
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• pp.107-112
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• 2007

The flux-lock type SFCL consists of transformer with primary and secondary windings connected to a superconducting element in serial. It can be divided into the subtractive and the additive polarity windings according to the winding direction. It could change the fault current limiting characteristics according to the inductance ratio between the coil 1 and coil 2. We investigated the voltage-current characteristics of the flux-lock type SFCL according to the increment of applied voltage. When the applied voltage of the SFCL with the subtractive and the additive polarity windings was increased a initial limiting current ($I_{ini}$) and the quench time of the superconducting element were increased. The recovery time of the superconducting element was increased by increment of applied voltage. Therefore, it was confirmed that recovery characteristics in the flux-lock type SFCL were largely dependent on the consumed energy of a superconducting element because of increment of the consumption power into the superconducting element.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.9
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• pp.1718-1724
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• 2017

Recently, Smart plugs for real time monitoring of household appliances based on IoT(Internet of Things) have been activated. Through this, consumers are able to save energy by monitoring real-time energy consumption at all times, and reduce power consumption through alarm function based on consumer setting. In this paper, we measure the alternating current from a wall power outlet for real-time monitoring. At this time, the current pattern for each household appliance was classified and it was experimented with deep learning to determine which product works. As a result, we used a cross validation method and a bootstrap verification method in order to the classification performance according to the type of appliances. Also, it is confirmed that the cost function and the learning success rate are the same as the train data and test data.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.93-103
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• 2002

A new current mirror for high-accuracy current-mode signal processing and integrated circuit design was proposed. The current mirror adopts the technique of an adaptive feedback to reduce the input impedance and the output stage of regulated cascode current mirror to increase the output impedance. Simulation results show that the current mirror has input impedance of 0.9Ω, the output impedance of 415 MΩ, and current gain of 0.96 at the supply voltage Vcc=5V. The power dissipation is 1.5㎽. In order to certify the applicability of the proposed current mirror, a voltage-to-current converter using the current mirror is designed. Simulation results show that the converter has good agreement with theoretical equation and has three times better conversion characteristics when compared with voltage-to-current converter using Wilson current mirror.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.21-32
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• 2006

A new SRAM circuit with row-by-row activation and low-swing write schemes is proposed to reduce switching power of active cells as well as leakage one of sleep cells in this paper. By driving source line of sleep cells by $V_{SSH}$ which is higher than $V_{SS}$, the leakage current can be reduced to 1/100 due to the cooperation of the reverse body-bias. Drain Induced Barrier Lowering (DIBL), and negative $V_{GS}$ effects. Moreover, the bit line leakage which may introduce a fault during the read operation can be eliminated in this new SRAM. Swing voltage on highly capacitive bit lines is reduced to $V_{DD}-to-V_{SSH}$ from the conventional $V_{DD}-to-V_{SS}$ during the write operation, greatly saving the bit line switching power. Combining the row-by-row activation scheme with the low-swing write does not require the additional area penalty. By the SPICE simulation with the Berkeley Predictive Technology Modes, 93% of leakage power and 43% of switching one are estimated to be saved in future leakage-dominant 70-un process. A test chip has been fabricated using $0.35-{\mu}m$ CMOS process to verify the effectiveness and feasibility of the new SRAM, where the switching power is measured to be 30% less than the conventional SRAM when the I/O bit width is only 8. The stored data is confirmed to be retained without loss until the retention voltage is reduced to 1.1V which is mainly due to the metal shield. The switching power will be expected to be more significant with increasing the I/O bit width.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.6
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• pp.793-798
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• 2010

In this paper we propose a low-power walking compensation method for biped robot based on consumption energy analysis. Firstly, basic walking motions that can reduce energy consumption of robot movements are implemented based on consumption energy analysis according to robot axes. We define knee bent motion as a basic walking motion. It can improve energy consumption and motion stability by lowering center of gravity of the biped robot. We analyze consumption energy of left and right leg of the robot using motor currents and propose a compensation method of walking motions to reduce unbalance of consumption energy between left leg and right leg. It can also improve energy consumption and walking stability of the robot. The proposed low-power compensation method based on consumption energy analysis is verified by walking experiments of a small biped robot with an embedded system.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.3
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• pp.487-494
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• 2020

In this paper, we propose a current memory circuit design that reduces static power consumption and maximizes the advantages of current mode signal processing. The proposed current memory circuit minimizes the problem in which the current transfer error increases as the data transfer time increases due to clock-feedthrough and charge-injection of the existing current memory circuit. The proposed circuit is designed to insert a support MOS capacitor that maximizes the Miller effect in the current transfer structure capable of low-power operation. As a result, it shows the improved current transfer error according to the memory time. From the experimental results of the chip, manufactured with MagnaChip / SK Hynix 0.35 process, it was verified that the current transfer error, according to the memory time, reduced to 5% or less.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.04a
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• pp.160-162
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• 2011

본 논문에서는 Zigbee 통신을 이용하여 대기전력을 차단함 함으로써 전력 소비를 줄이기 위한 스마트 오피스 시스템의 설계 및 구현에 관하여 기술한다. 구현된 시스템은 Server를 통하여 각 Client의 전류에 대한 통제를 가능하게 하며, 전력 사용 상황과 전력량 정보를 통해 사용자에게 고지함으로써 기존의 전자기기의 대기전력의 소비를 줄일 수 있다. 또한 외부 장치에서 Server로의 접근을 통해 제어할 수 있도록 하여 공간적인 문제도 고려하였다. 실험 결과를 통해 시스템을 이용함으로써 대기전력 소비가 종전보다 작아짐을 확인 할 수 있었다. Server는 ARM과 C#, Client는 ATmega와 C를 이용하여 구현하였다.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2064-2066
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• 2004

본 논문에서는 새로운 개념인 능동 고조파 결합을 이용한 4위상 전압제어 발진기를 설계, 제작하였다. 4위상 출력 특성을 얻기 위하여 각각의 차동 VCO의 가상 접지(Virtual Ground)면을 본 논문에 제시된 능동 고조파 결합 회로(Active super harmonic coupling)을 이용하여 결합시키는 방법을 적용하였다. 제안된 구조는 다음과 같은 장점을 가지고 있다. 결합구조를 갖는 트랜지스터에 부가적인 전류소비를 줄일 수 있으며, layout상에서 문제되었던 대칭구조를 개선할 수 있다. 또한 기존에 발표되었던 방법인 passive transformer를 이용한 고조파 결합 보다 회로 크기를 줄일 수 있다. 측정결과 출력 전력 -12dBm, -117dBc/Hz @1-MHz 이하의 위상잡음 특성, 2.66GHz${\sim}$2.91GHz의 250 MHz 주파수 가변, 25dB이하의 2차고조파 억압, 7 mA 의 전류 소모(buffer amp. 포함되지 않음)를 가졌다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.323-323
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• 2016

솔루션 공정을 이용하여 제작된 유기물 나노 입자를 포함한 유기물 나노 복합재료를 기반으로 제작한 비휘발성 메모리 소자들은 저렴한 가격, 간단한 공정, 저전력 소비의 장점으로 차세대 메모리 소자로서 많은 연구가 진행 되고 있다. 비휘발성 메모리 소자는 poly(3-hexylthiophene) (P3HT) 층과 polymethylsilsesquioxane (PMSSQ)와 graphene quantum dots (GQD)를 혼합한 층을 사용 하여 구성하였다. 세척된 indium-tin-oxide (ITO) 기판 위에 혼합된 PMSSQ/GQD를 스핀코팅 방법으로 증착한 후 열처리 하였다. Chlorobenzene 속에서 혼합된 P3HT를 스핀코팅 방법으로 증착한 후 열처리 하였다. 알루미늄 전극을 상부 전극으로 증착하였다. 제작된 소자의 300 K에서의 전류-전압을 측정 결과는 윈도우 마진이 크게 나오는 것을 알 수 있었다. 누설전류의 감소와 내구성 및 유지성에 대한 성질을 특정한 결과 소자가 안정적으로 동작하는 것을 확인할 수 있었다.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.14 no.3
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• pp.65-73
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• 2015

This paper presents a method of predicting the machining parameters on the turning process of low carbon steel using a neural network with back propagation (BP) and particle swarm optimization (PSO). Cutting speed, feed rate, and depth of cut are used as input variables, while surface roughness and electric current consumption are used as output variables. The data from experiments are used to train the neural network that uses BP and PSO to update the weights in the neural network. After training, the neural network model is run using test data, and the results using BP and PSO are compared with each other.