• Title/Summary/Keyword: 전력 증폭기

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Asymmetric Saturated 3-Stage Doherty Power Amplifier Using Envelope Tracking Technique for Improved Efficiency (효율 향상을 위해 포락선 추적 기술을 이용한 비대칭 포화 3-Stage 도허터 전력 증폭기)

  • Kim, Il-Du;Jee, Seung-Hoon;Moon, Jung-Hwan;Son, Jung-Hwan;Kim, Jung-Joon;Kim, Bum-Man
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.8
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    • pp.813-822
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    • 2009
  • We have investigated operation of a 1:2:2 asymmetric 3-stage Doherty PA(Power Amplifier) and implemented using the Freescale's 4 W, 10 W PEP LDMOSFETS at 1 GHz. By employing the three peak efficiency characteristics, compared to the two peak N-way Doherty PA, the asymmetric 3-stage Doherty can overcome the serious efficiency degradation along the backed-off output power region and maximize the average efficiency for the modulation signal. To maximize the efficiency characteristic, the inverse class F PA has been designed as carrier and peaking amplifiers. Furthermore, to extract the proper load modulation operation, the adaptive gate bias control signal has been applied to the two peaking PAs based on the envelope tracking technique. For the 802.16e Mobile WiMAX(World Interoperability for Microwave Access) signal with 8.5 dB PAPR(Peak to Average Power Ratio), the proposed Doherty PA has shown 55.46 % of high efficiency at an average output power of 36.85 dBm while maintaining the -37.23 dB of excellent RCE(Relative Constellation Error) characteristic. This is the first time demonstration of applying the saturated PA and adaptive gate bias control technique to the asymmetric 3-stage Doherty PA for the highly efficient transmitter of the base-station application.

Analysis of the Gate Bias Effects of the Cascode Structure for Class-E CMOS Power Amplifier (CMOS Class-E 전력증폭기의 Cascode 구조에 대한 게이트바이어스 효과 분석)

  • Seo, Donghwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.6
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    • pp.435-443
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    • 2017
  • In this study, we analyzed the effects of the common-gate transistor bias of a switching mode CMOS power amplifier. Although the most earier works occured on the transistor sizes of the cascode structure, we showed that the gate bias of the common-gate transistor also influences the overall efficiency of the power amplifier. To investigate the effect of the gate bias, we analyzed the DC power consumption according to the gate bias and hence the efficiency of the power amplifier. From the analyzed results, the optimized gate bias for the maximum efficiency is lower than the supply voltage of the power amplifier. We also found that an excessively low gate bias may degrade the output power and efficiency owing to the effects of the on-resistance of the cascode structure. To verify the analyzed results, we designed a 1.9 GHz switching mode power amplifier using $0.18{\mu}m$ RF CMOS technology. As predicted in the analysis, the maximum efficiency is obtained at 2.5 V, while the supply voltage of power amplifier is 3.3 V. The measured maximum efficiency is 31.5 % with an output power of 29.1 dBm. From the measureed results, we successfully verified the analysis.

Design of variable DC-DC Converter for improved efficiency of Power Amplifier in Underwater Communication System (수중통신용 전력증폭기의 효율 향상을 위한 가변 DC-DC 컨버터의 설계)

  • Kim, Seul-Gi;Lee, Chang-Yeol;Kim, In-Dong;Nho, Eui-Cheol;Moon, Won-Kyu;Kim, Won-Ho
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.181-182
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    • 2011
  • 수중에서는 대기와는 달리 매질의 차이로 인하여 통신의 제약이 따르므로 초음파를 이용하여 정보를 송 수신한다. 수중통신을 하기 위해서는 신호를 증폭시키는 전력증폭기와 초음파를 발생시키는 트랜스듀서가 필요하다. 전력증폭기는 수중에서의 발열과 연료문제로 인하여 높은 효율로 동작하여야한다. 하지만 전력증폭기에 인가되는 고정전압과 출력전압의 차이로 인해 손실이 발생하여 효율이 저하된다. 그러므로 본 논문에서는 전력증폭기의 효율 향상을 위해 출력전압에 따라 인가전압을 가변하는 ET(Envelope Tracking) 기술을 적용하기 위한 4[kW]급, 20[kHz]의 대역폭을 갖는 가변 DC-DC 컨버터를 설계하고 시뮬레이션을 통해 특성을 확인하였다.

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0.2W Ka-band MMIC CPW Power Amplifier Design and Fabrication (0.2W급 Ka-band MMIC CPW 전력증폭기 설계 및 제작)

  • 정상화;이상효;김대현;홍성철;권영우;서광석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.8B
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    • pp.1035-1040
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    • 2001
  • SNU-ISRC 0.25$\mu\textrm{m}$ pHEMT 표준 공정을 사용하여 Ka-band에서 동작하는 0.2W급 MMIC CPW 전력증폭기를 설계, 제작하였다. 기존의 MMIC 공정에서 사용되는 마이크로스트립 전송선 대신 CPW 전송선을 사용함으로써 보다 간단하고 저가의 공정이 가능하였다. 전력증폭기의 설계에서는 보다 넓은 주파수 대역에서 원하는 출력전력을 얻기 위해서 출력단을 Wilkinson coupler를 사용하였는데, 일반적으로 Wilkinson coupler에 사용되는 50Ω 특성임피던스 전송선 대신에 25Ω 특성임피던스 전송선을 사용하여 좋은 출력단 전력 정합과 출력 반사손실을 동시에 얻을 수 있었다. 제작된 전력증폭기의 측정결과, 주파수 27GHz에서 출력전력 23.4dBm과 Power-added Efficiency 21.7%의 결과를 보였다.

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At 900 MHz and 2.14 GHz, a Design of dual band high efficiency Doherty Power Amplifier using single FET (900 MHz / 2.14 GHz해서의 단일 FET을 이용한 이중대역 고효율 도허티 전력증폭기 설계)

  • Lee, Jy-Hwan;Kim, Seon-Sook;Seo, Chul-Hun
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.141-142
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    • 2006
  • 본 논문에서는 단일 FET를 이용하여 900MHz/2.14GHz 이중 대역 고효율 도허티 전력증폭기 설계 구현을 하였다. 이중대역 도허티 전격증폭기의 출력전력은 900MHz 에서 35.91dBm, 2.14GHz에서 35.91 dBm의 출력을 얻었으며, 전력부가효율은 900MHz에서 40.32%, 2.14GHz에서는 40.47%의 효율을 획득 하였다. 또한 본 논문에서 단 하나의 능등소자를 이용하여 최대한의 출력전력을 얻기 위하여 최대 전력정합법을 사용하였으며 그 결과 이중대역 전력증폭기를 구현할 수 있었다.

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Implementation of a Power Amplifier in Underwater Communication System (수중 통신용 전력증폭기의 구현)

  • Lee, Chang-Yeol;Shim, Jae-Hyeok;Kim, In-Dong;Nho, Eui-Cheol;Moon, Won-Kyu;Kim, Won-Ho
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.101-102
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    • 2012
  • 수중에서는 대기와 달리 매질의 차이로 인하여 통신의 제약이 따르므로 초음파를 이용하여 정보를 송 수신한다. 수중통신을 하기 위해서는 신호를 증폭시키는 전력증폭기와 증폭된 전기 신호를 초음파로 변환시키는 트랜스듀서가 필요하다. 전력증폭기는 선형적인 출력이 보장되어야 하며, 수중에서의 발열과 연료문제로 인하여 높은 효율로 동작하여야 한다. 하지만 기존의 전력증폭기는 인가되는 고정전압과 출력전압의 차이로 인해 손실이 발생하여 효율이 저하된다. 본 논문에서는 수중 통신에 적합한 특성을 가진 APEX사의 Class B push-pull 타입의 MP108A증폭기를 사용하여 선형적인 출력 특성을 보장하며 넓은 대역폭을 갖는 전력증폭기를 구현하고, 실험을 통해 특성을 확인하였다.

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Linearization Up to the Saturation Region of Poller Amplifiers (전력증폭기 포화영역까지의 선형화)

  • 민이규;이상설
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.2
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    • pp.146-154
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    • 2002
  • This paper presents a linearization technique up to the saturation region of power amplifiers. The predistorter gain polynomials which have optimum coefficients are introduced. Power amplifiers are most efficient when operated near the saturation region. Compensating the amplifier nonlinearities with these predistorter gain polynomials, the efficiency of the amplifier can be maximized. Simulation results demonstrate that the adjacent channel power ratio (ACPR) is improves by about 63 ㏈ at the band edge. The convergence and reconvergence characteristics of the linearizer are also satisfactory.

A Resonance Power Combining Technique Using CRLH-Transmission Line (CRLH 전송 선로를 이용한 공진 기법의 전력 결합 기술)

  • Kim, Ell-Kou;Kim, Young;Kwon, Sang-Keun;Yoon, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.8
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    • pp.673-679
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    • 2009
  • This paper proposes a resonance power-combining technique using CRLH-transmission line. The circuits using proposed technique consist of the parallel capacitances and transmission lines to satisfy matching conditions and to combine power of amplifiers. The CRLH(Composite Right/Lefi-Handed) transmission lines are used to reduce the circuit size. As a result, the power combining amplifier using proposed techniques is measured that a gain is equal and the output power is increased about 2.2 dB higher than the single amplifier. Also, a size of amplifier is 78.3 % smaller than the conventional amplifier using RH transmission line.

Design and Fabrication of a HBT Power Amplifier for Quasi Millimeter-wave Broadband Wireless Local Loop Applications (준밀리미터파 BWLL용 HBT 전력증폭기 설계 및 제작)

  • 김창우;채규성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3C
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    • pp.234-240
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    • 2002
  • A power amplifier with AlGaAs/InGaAs/GaAs HBT's has been developed for customer premise equipments of the quasi millimeter-wave frequency-band broadband wireless local loop(BWLL) system. Parameters of the linear and nonlinear equivalent circuits for a common base HBT have been extracted by a fitting method. The amplifier has been designed through the linear and nonlinear circuit simulations and fabricated on a ceramic substrate for a hybrid IC. The amplifier has produced a 25.5-dBm output power with 35% power-added efficiency(PAE) at 24.4 GHz and achieved a 7.5-dB linear power gain at 24.8 GHz. In 24.25 ∼24.75 GHz band, the amplifier has exhibited a saturated output over larger than 22 dBm and PAE higher than 25%.

A Highly Efficient Multi-Mode Balanced Power Amplifier for W-CDMA Handset Applications (W-CDMA 단말기용 고효율 다중 모드 Balanced 전력증폭기)

  • Kim, Un-Ha;Park, Sung-Hwan;Park, Hong-Jong;Kwon, Young-Woo;Kim, Jung-Hyun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.5
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    • pp.606-612
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    • 2012
  • A highly efficient multi-mode balanced power amplifier(PA) structure is proposed for W-CDMA handset applications. The proposed PA has 2-stage amplifier configuration and the stage-bypass and load impedance switching techniques were applied to enhance power efficiency at medium power level as well as low output power level. Using the two techniques, four highly efficient power modes were realized. To demonstrate the usefulness of the proposed structure, a GaAs HBT balanced PA module was designed, fabricated, and measured.