• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.671-674
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• 1998

본 논문에서는 최근 급격히 수요가 증대하고 있는 휴대용 단말기의 수신기 선단에 사용되는 저잡음 증폭기(LNA)를 0.6㎛ CMOS공정 파라미터를 사용하여 설계하였다. 설계된 LNA는 전원 전압 ±1.2v, 900㎒대에서 동작하는 전류 재사용방식의 적층 CMOS구조로서 시뮬레이션 결과 전력소모가 9.45㎽, 전력이득은 23.7dB, 선형지수 OIP3는 7.6dBm을 나타내어 저전력 저잡음 특성을 얻었다. 사용된 인덕터의 Q는 3.5이다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.5 s.108
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• pp.483-489
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• 2006

In this paper, new wideband lens amplifiers are proposed for C-band wireless communication service. In order to obtain the wideband property, all components of the proposed lens amplifiers are designed with balanced structure and wideband characteristics. Fat dipole antenna as the input and output antenna, balanced amplifier as amplifying components, and coplanar stripline(CPS) as the delay line fer the beam focusing are used fur composing the stable wideband lens amplifier. The $5{\times}5$ 2D lens amplifier has the characteristics that the absolute gain is 7.5 dB, the EIPG is 37.4 dB at 6 GHz, and the 3-dB gain bandwidth is 19.8 %.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.76-80
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• 2007

In this paper, the PAE (Power Added Efficiency) and the linearity of the Doherty amplifier has been improved using dual bias control and PBG (Photonic BandGap) structure. The PBG structure has used to implement on output matching circuit and dual bias control has applied to improve the PAE of the Doherty amplifier at a low input level by applying it to a carrier amplifier. The Doherty amplifier using the proposed structure has improved PAE by 8% and 5dBc of IMD3 (3rd Inter-Modulation Distortion) compared with those of the conventional class AB amplifier. In addition to, it has been evident that the designed the structure has showed more than a 30% increase in PAE for flatness over all input power level.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.707-712
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• 2006

In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1612-1620
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• 2003

This papers describes a nonlinear transfer function modelling of designed GaAs FET power amplifier by measured and simulated values of designed PA amplifier for multi­carrier transmission system, With the results of PA nonlinearity characteristic, we can estimates AM­AM and AM­PM of designed PA. According to the estimated nonlinear characteristics, we can analysis the ACPR of PA for spectral regrowth, the error vector measurement(EVM) of constallation signals and bit error rate of QPSK and 64­QAM. The suggested nonlinear modelling results are used to get an accurate estimate of digital characteristics between PA amplifier and wireless multi­carrier transmission system using OFDM.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.107-111
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• 2009

In this paper, the power added efficiency(PAE) of a Doherty amplifier has been improved by applying Photonic Bandgap(PBG) characteristics on the output of amplifier. As a result of the high order harmonics termination, excellent improvement in PAE, maximum output power as well as linearity is obtained. The PAE is improved as much as relatively 35% compared with a conventional Doherty amplifier. Moreover, size of LPF is reduced by PBG characteristics. Therefore the whole amplifier circuit size is considerably reduced by diminishing in size of the LPF as compared with a Doherty amplifier using conventional LPFs.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.504-509
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• 2005

This paper evaluates the BER performance of MC-DS-CDMA systems in frequency selective Rayleigh fading channel, considering the carrier frequency offset and the nonlinear high power amplifier. In the uplink MC-DS-CDMA, the BER performance is better than in the downlink. This paper presents the required output back-off of the nonlinear amplifier and value of frequency offset for good BER performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.503-512
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• 2001

A new adaptation algorithm for the digital predistorter is presented. The proposed technique employs the real-time transmitted signals through HPA for the table update. Hence the proposed algorithm does not depend on modulation format and the signal transmission of HPA is not affected during the adaptation process. The experimental results are presented to verify the proposed method and we obtained about 8.4 dB of ACPR improvement.

• Proceedings of the KIEE Conference
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• 2004.11b
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• pp.147-150
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• 2004

본 논문에서는 분산전원 계통을 모의하기 위한 시뮬레이터의 설계와 시험에 대한 내용을 제시하고자 한다. 제시하고자 하는 시뮬레이터는 RTDS(Real Time Digital Simulator)와 전력 증폭기(power amplifier)로 구성된다. RTDS 부분은 분산전원이 적용되는 계통의 모의와 분산전원의 전원부 모의를 위해 사용되며 전력 증폭기는 RTDS에 의해 모의된 전력 계통의 모선 전압 출력과 분산전원 전원부의 전압 출력을 증폭하기 위하여 사용된다. 시뮬레이터 구성을 위해 사용되는 RTDS의 구성과 제작된 전력 증폭기의 사양과 동작시험에 대한 결과를 제시하고자 한다. 개발된 시뮬레이터는 분산전원의 동적 및 정적 성능 평가를 위한 시험 시스템 개발에 적용될 수 있다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.647-648
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• 2016

본 논문에서는 차량용 레이더를 위한 저 전력 24GHz CMOS 저 잡음 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 저 전력에서도 높은 전압 이득과 낮은 잡음지수를 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 고주파 CMOS 공정으로 구현되어 있다. 제안한 회로는 최근 발표된 연구결과에 비해 저 전력동작에서 높은 전압이득 및 낮은 잡음지수 특성을 보였다.