• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.89-94
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• 2007

For successful implementation of multi-standard transmitter, reconfigurable architecture and component design are essential. This paper presents a reconfigurable CMOS power amplifier designed CMOS 0.25 um process. Designed power amplifier can be operated at 0.9, 1.2, 1.75, and 1.85 GHz. Also, it can be used at 2.4 GHz by using bonding wire inductor. The interstage matching network is composed of two inductors and four switches, and operation frequency can be varied by controlling switches. Proposed power amplifier can be used as a power amplifier in low power applications such as ZigBee or Bluetooth application and used as a driver amplifier in high power application such as CDMA application. Designed power amplifier has 18.2 dB gain and 10.3 dBm output power at 0.9 GHz. Also, it represented 10.3 (18.1) dB gain and 5.2 (10) dBm output power at 1.75 (2.4) GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.2
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• pp.183-188
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• 2014

In this paper, the propagation effect of power supply uncertainty on the output of class-F power amplifier has been estimated. Also, a 1.9 GHz, 10 watt class-F power amplifier was measured to verify the estimation and to find the optimal biasing point. By approximating the propagation theory of uncertainties, the propagation effect of bias uncertainty was mathmatically calculated. As a result, the DC biases have propagated uncertainties of 15~70 mW. However, at the optimized bias point, the uncertainty in the output power could be dropped less than 15 mW while the output power has dropped by 0.37 dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.7
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• pp.807-815
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• 2019

In this paper, we design a power amplifier to support quad-band in wireless communication devices using RF CMOS 180-nm process. The proposed power amplifier consists of low-band 0.9, 1.8, and 2.4 GHz and high-band 5 GHz. We proposed a structure that can support each input matching network without using a switch. For maximum linear output power, the output matching network was designed for impedance conversion to the power matching point. The fabricated quad-band power amplifier was verified using modulation signals. The long-term evolution(LTE) 10 MHz modulated signal was used for 0.9 and 1.8 GHz, and the measured output power is 23.55 and 24.23 dBm, respectively. The LTE 20 MHz modulated signal was used for 1.8 GHz, and the measured output power is 22.24 dBm. The wireless local area network(WLAN) 802.11n modulated signal was used for 2.4 GHz and 5.0 GHz. We obtain maximum linear output power of 20.58 dBm at 2.4 GHz and 17.7 dBm at 5.0 GHz.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.8
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• pp.945-952
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• 2015

Power amplification device which is matched to $50{\Omega}$ in order to achieve a high efficiency of a power amplifier using a GaN power amplification device, since there is a limit of application frequency bands, output power, efficiency characteristics selection, in this study based on the measurement data through the source/load-pull test, high output power and to extract quantitative input and output impedance that matches the design objectives of high output power, high efficiency, an implementation of the high efficiency power amplifier. Implemented power amplifier is shows 25watt(44dBm), PAE of 66-76% characteristics in the frequency band of 2.7-3.1 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.993-998
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• 2002

At Power amplifier, distortion of output is appeared because of non-linearlity, so we must study method of compensation for non-linearity. In this paper, it was studied about the characteristic of predistorter using serial schottky diode for an amplifier. As a result, we confirmed that power amplifier was able to linearize when we put predistorter using non-linearity of schottky diode before power amplifier. When input carrier level was low, input carrier was delivered directly into power amplifier but input carrier level was high, input carrier was delivered into power amplifier through predistorter with suppressed level. As a result power amplifier always was at saturation region. Through simulation using serenade 8.0, we have concluded that efficiency was improved about 3%, and predistorter got best linearity at 1.8㎓ between 800㎒∼2.2㎓.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.65-71
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• 2007

Doherty amplifier has more efficiency and distortion than general amplifier. These distortion classified amplitude distortion and phase distortion, memory effect distortion. This paper reports on an attempt to investigate, model and quantity the contribution of the electrical nonlinearity effects and the thermal memory effects to a doherty amplifier's distortion generation and suggests thermal memory effect compensator for pre-distorter. Also this paper reports on the development of an accurate dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. The parameters of suggested model suppress thermal memory effects doherty amplifier with pre-distorter. Pre-distorter with electrothermal memory effect compensator for doherty amplifier enhanced ACLR performance about 22 dB than general doherty amplifier. Experiment results were mesured by 50W LDMOS Doherty amplifier and pre-distorter with electrothermal memory effect compensator was simulated by ADS.

• Journal of Satellite, Information and Communications
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• v.5 no.2
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• pp.82-86
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• 2010

In this paper, a power amplifier module for WCDMA base-station applications is designed and implemented using GaN field-effect transistors (FETs), which uses an envelope tracking bias system. The designed module consists of an high gain MMIC amplifier, a driver amplifier, a power amplifier, and bias circuits for envelope tracking applications. Especially, a FET bias sequencing circuit and two isolators are integrated for stable RF operations. All circuits are assembled within a single housing, so its dimension is just $17.8{\times}9.8{\times}2.0\;cm3$. Measured results show that the developed power amplifier module has good envelope tracking capability: the power-added efficiency of 35% at the output power range from 30dBm to 40dBm over a wide range of drain bias.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.7-12
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• 2008

In this paper, a highly efficiency power amplifier is presented for multi-band antenna system. The class F power amplifier operating in dual-band designed with one LDMOSFET. An operating frequency of power amplifier is 900 MHz and 2.14 GHz respectively Matching networks and harmonic control circuits of amplifier are designed by using the unit cell of composite right/left-handed(CRLH) transmission line(TL) realized with lumped elements. The CRLH TL can lead to metamaterial transmission line with the dual-band holing capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of all harmonic components for high efficiency is very difficult, we have controled only the second- and third-harmonics to obtain the high efficiency with the CRLH TL. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.6
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• pp.726-732
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• 2019

In this study, we proposed an asymmetric differential inductor to improve the linearity of differential power amplifiers. Considering the phase error between differential signals of the differential amplifier, the location of the center tap of the differential inductor was modified to minimize the error. As a result, the center tap was positioned asymmetrically inside the differential inductor. With the asymmetric differential inductor, the AM-to-AM and AM-to-PM distortions of the amplifier were suppressed. To confirm the feasibility of the inductor, we designed a 2.4 GHz differential CMOS PA for IEEE 802.11n WLAN applications with a 64-quadrature amplitude modulation (QAM), 9.6 dB peak-to-average power ratio (PAPR), and a bandwidth of 20 MHz. The designed power amplifier was fabricated using the 180-nm RF CMOS process. The measured maximum linear output power was 17 dBm, whereas EVM was 5%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.7
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• pp.762-768
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• 2003

This paper reports the effects of gain flatness for linearity improvement of feedforward power amplifier fur IMT-2000 band. To investigate the operational characteristics for gain flatness of each amplifier, WCDMA 4FA input signal was used and measured 10 W output power. Especially, linearity improvement for variation of gain flatness of each amplifier was investigated that have an effect on linearity improvement such as delay line, phase, and amplitude imbalances. Variation of gain flatness of main amplifier is 40 MHz and of error amplifier is 40 MHz and 80 MHz bandwidth, respectively. Measured results, gain flatness of main amplifier is less than 1.5 dB and of error amplifier is less than 0.5 dB for more than 20 dB improvement at 5 MHz offset. In addition to that results, the characteristics of feedforward amplifier are drastically varied by gain flatness of error amplifier and it is shown that gain flatness of error amplifier is more important factor for linearity improvement.